USB3450-FZG SMSC [SMSC Corporation], USB3450-FZG Datasheet - Page 34

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USB3450-FZG

Manufacturer Part Number
USB3450-FZG
Description
HI-SPEED USB HOST OR DEVICE PHY WITH UTMI+INTERFACE
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Revision 0.1 (05-11-05)
PARAMETER
TIMING
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
Figure 7.5 HS Detection Handshake Timing Behavior (HS Mode)
HS Handshake begins. DP pull-up enabled, HS
terminations disabled.
Device asserts Chirp K on the bus.
Device removes Chirp K from the bus. 1 ms
minimum width.
Downstream facing port asserts Chirp K on the
bus.
Downstream facing port toggles Chirp K to Chirp J
on the bus.
Downstream facing port toggles Chirp J to Chirp K
on the bus.
Device detects downstream port chirp.
Chirp detected by the device. Device removes DP
pull-up and asserts HS terminations, reverts to HS
default state and waits for end of reset.
Terminate host port Chirp K-J sequence (Repeating
T4 and T5)
The earliest time at which host port may end reset.
The latest time, at which the device may remove
the DP pull-up and assert the HS terminations,
reverts to HS default state.
DESCRIPTION
Table 7.7 Reset Timing Values
DATASHEET
34
Hi-Speed USB Host or Device PHY With UTMI+ Interface
0 (reference)
T0 < T1 < HS Reset T0 + 6.0ms
T0 + 1.0ms < T2 <
HS Reset T0 + 7.0ms
T2 < T3 < T2+100µs
T3 + 40µs < T4 < T3 + 60µs
T4 + 40µs < T5 < T4 + 60µs
T6
T6 < T7 < T6 + 500µs
T9 - 500µs < T8 < T9 - 100µs
HS Reset T0 + 10ms
VALUE
SMSC USB3450
Datasheet

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