FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 112

• Manufacturer Part Number: FDC37N769_07
• Description: 3.3V Super I/O Controller with Infrared Support for Portable Applications
• Manufacturer: SMSC [SMSC Corporation]

CR2C
CR2C can only be accessed in the configuration state and after the CSR has been initialized to 2CH. The default
value of this register after power up is 00H (Table 113). Bits D[3:0] of this register are used to select the DMA for the
SCE (FIR). Bits D[7:4] are Reserved. Reserved bits cannot be written and return 0 when read. Any unselected DMA
Request output (DRQ) is in tristate.
CR2D
CR2D can only be accessed in the configuration state and after the CSR has been initialized to 2DH. The default
value of this register after power up is 03H (Table 114). CR2D is used to set the IR Half Duplex Turnaround Delay
Time for the IR port. This value is 0 to 10msec in 100µsec increments.
The IRCC v2.0 block includes an 8 bit IR Half Duplex Time-out register in SCE Register Block 5, Address 1 that
interacts with configuration register CR2D. These two registers behave like the other IRCC Legacy controls where
either source uniformly updates the value of both registers when either register is explicitly written using IOW or
following a device-level POR. IRCC software resets do not affect these registers.
The IR Half Duplex Time-out is programmable from 0 to 25.5mS in 100μS increments, as follows:
IR HALF DUPLEX TIME-OUT = (CR2D) x 100μS
CR2E
CR2E can only be accessed in the configuration state and after the CSR has been initialized to 2EH. The default
value of this register after power up is 00H (Table 115). CR2E is directly connected to SCE Register Block Three,
Address 0x05 in the IRCC v2.0 block.
CR2F
CR2F can only be accessed in the configuration state and after the CSR has been initialized to 2FH. The default
value of this register after power up is 00H (Table 116). CR2F is directly connected to SCE Register Block Three,
Address 0x06 in the IRCC v2.0 block.
SMSC DS – FDC37N769
CR2D
CR2E
CR2F
R/W
R/W
R/W
D7
D7
D7
Table 113 - CR2C: SCE (FIR) DMA Select Register
D6
D6
D6
D3-D0
DATASHEET
0000
0001
0010
0011
D5
IR HALF DUPLEX TIME-OUT
D5
D5
Table 114 - CR2D
Table 115 - CR2E
Table 116 - CR2F
Software Select A
Page 112 of 137
Software Select B
D4
D4
D4
DMA SELECTED
D3
DMA_A
DMA_B
DMA_C
D3
D3
None
D2
D2
D2
D1
D1
D1
D0
D0
D0
DEFAULT
DEFAUL
DEFAUL
0x03
0x00
0x00
T
T
Rev. 02-16-07