FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 115

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FDC37N769_07

Manufacturer Part Number
FDC37N769_07
Description
3.3V Super I/O Controller with Infrared Support for Portable Applications
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Note 1: Output leakage is measured with the current pins in high impedance as defined by
Note 2: Output leakage is measured with the low driving output off, either for a high level output or a high impedance
Note 3: Defined by the device configuration with the PWRGD input low.
CAPACITANCE T
SMSC DS – FDC37N769
Clock Input Capacitance
Input Capacitance
Output Capacitance
O4 Type Buffer
Low Output Level
High Output Level
Output Leakage
OD12 Type Buffer
Low Output Level
Output Leakage
Supply Current Active
Supply Current Standby
ChiProtect
(SLCT, PE, BUSY, nACK,
nERROR)
Backdrive Protect
(nSLCTIN, nINIT, nAUTOFD,
nSTROBE, PD[7:0])
state defined by PWRGD.
PARAMETER
PARAMETER
A
= 25°C; fc = 1MHz; V
SD[0:7]
IOCHRDY
IRQs
DRQs
nWGATE
nWDATA
nHDSEL
nDIR
nSTEP
nDS[1:0]
nMTR[1:0]
SIGNAL NAME
Table 119 - Capacitive Loading per Output Pin
SYMBOL
SYMBOL
I
C
V
V
V
CSBY
I
C
C
I
I
I
I
CC
OL
OL
CC
OUT
OH
OL
OL
IL
IL
IN
IN
DATASHEET
Table 118 - Clock Pin Loading
= 3.3V
MIN
-10
-10
2.4
MIN
Page 115 of 137
TOTAL CAPACITANCE (pF)
TYP
LIMITS
15
TYP
MAX
+10
+10
100
±10
±10
0.4
0.4
20
MAX
240
240
120
120
240
240
240
240
240
240
240
20
10
20
UNITS
mA
µA
µA
µA
µA
µA
V
V
V
UNIT
pF
pF
pF
I
I
V
(Note 1)
I
V
(Note 1)
All outputs open.
Note 3
Chip in circuit:
V
V
Chip in circuit:
V
V
OL
OH
OL
IN
IN
CC
IN
CC
IN
= 4mA
= 12 mA
= -2mA
= 0 to V
= 0 to V
= 5.5V Max.
= 5.5V Max.
= 0V
= 0V
All pins except pin
under test tied to AC
ground
TEST CONDITION
COMMENTS
the PWRGD pin.
cc
cc
Rev. 02-16-07

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