MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 172
MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
- Current page: 172 of 454
- Download datasheet (6Mb)
Clock Generator Module (CGM)
Technical Data
172
ACQ — Acquisition Mode Bit
XLD — Crystal Loss Detect Bit
Bits 3–0 — Reserved for Test
1. Write a logic 1 to XLD.
2. Wait N
3. Read XLD.
When the AUTO bit is set, ACQ is a read-only bit that indicates
whether the PLL is in acquisition mode or tracking mode. When the
AUTO bit is clear, ACQ is a read/write bit that controls whether the
PLL is in acquisition or tracking mode.
In automatic bandwidth control mode (AUTO = 1), the last-written
value from manual operation is stored in a temporary location and is
recovered when manual operation resumes. Reset clears this bit,
enabling acquisition mode.
When the VCO output, CGMVCLK, is driving CGMOUT, this
read/write bit can indicate whether the crystal reference frequency is
active or not.
To check the status of the crystal reference:
The crystal loss detect function works only when the BCS bit is set,
selecting CGMVCLK to drive CGMOUT. When BCS is clear, XLD
always reads as logic 0.
These bits enable test functions not available in user mode. To ensure
software portability from development systems to user applications,
software should write 0s to bits 3–0 when writing to PBWC.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Tracking mode
0 = Acquisition mode
1 = Crystal reference not active
0 = Crystal reference active
Clock Generator Module (CGM)
Go to: www.freescale.com
4 cycles. N is the VCO frequency multiplier.
MC68HC908AS60 — Rev. 1.0
MOTOROLA
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