MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 310

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MC68HC908AS60MFN

Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Input/Output (I/O) Ports
Technical Data
310
NOTE:
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Figure 20-10
When bit DDRCx is a logic 1, reading address $0002 reads the PTCx
data latch. When bit DDRCx is a logic 0, reading address $0002 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port C pins.
X = Don’t care
Hi-Z = High impedance
1. Writing affects data register, but does not affect input.
Freescale Semiconductor, Inc.
DDRC
Bit
For More Information On This Product,
0
1
0
1
READ DDRC ($0006)
WRITE DDRC ($0006)
WRITE PTC ($0002)
READ PTC ($0002)
Go to: www.freescale.com
shows the port C I/O logic.
Input/Output (I/O) Ports
PTC
Bit
X
X
2
2
Table 20-3. Port C Pin Functions
Figure 20-10. Port C I/O Circuit
RESET
Input, Hi-Z
Input, Hi-Z
I/O Pin
Output
Output
Mode
DDRCx
PTCx
Read/Write
DDRC[5:0]
DDRC[5:0]
DDRC[5:0]
DDRC[5:0]
Accesses
to DDRC
MC68HC908AS60 — Rev. 1.0
Table 20-3
PTC[5:0]
Read
Accesses to PTC
Pin
Pin
0
summarizes
MOTOROLA
PTC[5:0]
PTC[5:0]
Write
PTC2
PTCx
(1)

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