MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 140

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Low-Voltage Inhibit (LVI)
8.4.2 Forced Reset Operation
8.4.3 Voltage Hysteresis Protection
8.4.4 LVI Trip Selection
Technical Data
140
NOTE:
In applications that require V
LVI resets allows the LVI module to reset the MCU when V
the V
LVIRSTD bits must be at logic 0 to enable the LVI module and to enable
LVI resets.
Once the LVI has triggered (by having V
maintain a reset condition until V
voltage, V
entering and exiting reset if V
is greater than V
The LVI5OR3 bit in the configuration register selects whether the LVI is
configured for 5-V or 3-V protection.
The microcontroller is guaranteed to operate at a minimum supply
voltage. The trip point (V
See
20.7 3.0-Vdc DC Electrical Characteristics
voltages.
20.6 5.0-Vdc DC Electrical Characteristics
TRIPF
TRIPR
level. In the configuration register, the LVIPWRD and
Low-Voltage Inhibit (LVI)
. This prevents a condition in which the MCU is continually
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
TRIPF
by the hysteresis voltage, VHYS.
TRIPF
DD
[5 V] or V
DD
to remain above the V
is approximately equal to V
DD
rises above the rising trip point
TRIPF
DD
fall below V
[3 V]) may be lower than this.
for the actual trip point
and
TRIPF
TRIPF
level, enabling
DD
), the LVI will
TRIPF
falls below
MOTOROLA
. V
TRIPR

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