MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 151
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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10.3.1 Port A Data Register
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Function:
Function:
Alternate
Alternate
Address:
The port A data register (PTA) contains a data latch for each of the five
port A pins.
PTA4–PTA0 — Port A Data Bits
KBD4–KBD0 — Keyboard Wakeup Bits
TCH1 and TCH0 — Timer Channel I/O Bits
Reset:
Read:
Write:
These read/write bits are software programmable. Data direction of
each port A pin is under the control of the corresponding bit in data
direction register A. Reset has no effect on port A data.
The keyboard interrupt enable bits, KBIE4–KBIE0, in the keyboard
interrupt control register, enable the port A pins as external interrupt
pins. See
The PTA3/KBD3/TCH1 and PTA2/KBD2/TCH0 pins are the TIM input
capture/output compare pins. The edge/level select bits, ELSxB and
ELSxA, determine whether the pins are timer channel I/O pins or
general-purpose I/O pins. See
(TIM).
$0000
Bit 7
0
Section 13. Keyboard Interrupt Module
Figure 10-2. Port A Data Register (PTA)
Input/Output (I/O) Ports
= Unimplemented
6
0
5
0
Unaffected by reset
KBD4
VREFH
PTA4
Section 16. Timer Interface Module
4
KBD3
TCH1
PTA3
3
KBD2
TCH0
PTA2
2
Input/Output (I/O) Ports
(KBI).
PTA1
KBD1
1
Technical Data
KBD0
PTA0
Bit 0
Port A
151
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