LU82551IT INTEL [Intel Corporation], LU82551IT Datasheet - Page 59

• Manufacturer Part Number: LU82551IT
• Description: Fast Ethernet PCI Controller
• Manufacturer: INTEL [Intel Corporation]

8.0
8.1
Datasheet
Figure 19. Control/Status Register
Control/Status Registers
LAN (Ethernet) Control/Status Registers
The 82551IT’s Control/Status Register (CSR) is shown in the figure
NOTE: In
SCB Status Word: The 82551IT places the status of its Command and Receive units and interrupt
indications in this register for the CPU to read.
SCB Command Word: The CPU places commands for the Command and Receive units in this
register. Interrupts are also acknowledged in this register.
SCB General Pointer: The SCB General Pointer register points to various data structures in main
memory depending on the current SCB Command word.
PORT Interface: The PORT interface allows the CPU to reset the 82551IT, force the 82551IT to
dump information to main memory, or perform an internal self test.
Flash Control Register: The Flash Control register allows the CPU to enable writes to an external
Flash.
EEPROM Control Register: The EEPROM Control register allows the CPU to read and write to
an external EEPROM.
D31
PMDR
as the Power Management Driver Register.
EEPROM Control Register
Figure 19
SCB Command Word
Upper Word
Reserved
above, SCB is defined as the System Control Block of the 82551IT, and PMDR is defined
Management Data Interface (MDI) Control Register
Receive Direct Memory Access Byte Count
System Control Block General Pointer
Function Present State Register
Function Event Mask Register
Flow Control Register
Command Block Pointer
Function Event Register
Force Event Register
D16
Reserved
Reserved
Reserved
PORT
General Status
D15
Flash Control Register
SCB Status Word
Lower Word
Networking Silicon — 82551IT
Figure
General Control
Reserved
19.
D0
00h
04h
08h
0Ch
10h
14h
18h
1Ch
20h
24h
28h
2Ch
30h
34h
38h
3Ch
Offset
53