LU82551IT INTEL [Intel Corporation], LU82551IT Datasheet - Page 64

• Manufacturer Part Number: LU82551IT
• Description: Fast Ethernet PCI Controller
• Manufacturer: INTEL [Intel Corporation]

82551IT — Networking Silicon
58
Table 23. Statistical Counters
44
48
52
56
60
64
68
72
ID
Receive Alignment Errors
Receive Resource Errors
Receive Overrun Errors
Receive Collision Detect (CDT)
Receive Short Frame Errors
Flow Control Transmit Pause
Flow Control Receive Pause
Flow Control Receive Unsupported
Counter
This counter contains the number of frames that are both
misaligned (for example, CRS de-asserts on a non-octal
boundary) and contain a CRC error. The counter is updated, if
needed, regardless of the Receive Unit state. The Receive
Alignment Errors counter is mutually exclusive of the Receive
CRC Errors and Receive Short Frame Errors counters.
This counter contains the number of good frames discarded
due to unavailability of resources. Frames intended for a host
whose Receive Unit is in the No Resources state fall into this
category. If the 82551IT is configured to Save Bad Frames
and the status of the received frame indicates that it is a bad
frame, the Receive Resource Errors counter is not updated.
This counter contains the number of frames known to be lost
because the local system bus was not available. If the traffic
problem persists for more than one frame, the frames that
follow the first are also lost; however, because there is no lost
frame indicator, they are not counted.
This counter contains the number of frames that encountered
collisions during frame reception.
This counter contains the number of received frames that are
shorter than the minimum frame length. The Receive Short
Frame Errors counter is mutually exclusive to the Receive
Alignment Errors and Receive CRC Errors counters. A short
frame will always increment only the Receive Short Frame
Errors counter.
This counter contains the number of Flow Control frames
transmitted by the 82551IT. This count includes both the Xoff
frames transmitted and Xon (PAUSE(0)) frames transmitted.
This counter contains the number of Flow Control frames
received by the 82551IT. This count includes both the Xoff
frames received and Xon (PAUSE(0)) frames received.
This counter contains the number of MAC Control frames
received by the 82551IT that are not Flow Control Pause
frames. These frames are valid MAC control frames that have
the predefined MAC control Type value and a valid address
but has an unsupported opcode.
Description
Datasheet