ADM1027ARQZ-RL71 ONSEMI [ON Semiconductor], ADM1027ARQZ-RL71 Datasheet - Page 49

• Manufacturer Part Number: ADM1027ARQZ-RL71
• Manufacturer: ONSEMI [ON Semiconductor]

Bit
<2:0>
<3>
<6:4>
<7>
This register becomes read-only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register
will have no effect.
REV. A
ACOU3
ACOU2
Name
EN3
EN2
Table XIX. Register 0x63 – Enhance Acoustics Register 2 (Power-On Default = 0x00)
R/W
Read/Write
Read/Write
Read/Write
Read/Write
These bits select the ramp rate applied to the PWM3 output. Instead of PWM3 jumping
These bits select the ramp rate applied to the PWM2 output. Instead of PWM2 jumping
Description
instantaneously to its newly calculated speed, PWM3 will ramp gracefully at the rate
determined by these bits. This effect enhances the acoustics of the fan being driven by the
PWM3 output.
Time slot increase
000 = 1
001 = 2
010 = 3
011 = 5
100 = 8
101 = 12
110 = 24
111 = 48
When this bit is 1, acoustic enhancement is enabled on PWM3 output. When acoustic
enhancement is enabled, fan spin-up time should be disabled.
instantaneously to its newly calculated speed, PWM2 will ramp gracefully at the rate
determined by these bits. This effect enhances the acoustics of the fans being driven by
the PWM2 output.
Time slot increase
000 = 1
001 = 2
010 = 3
011 = 5
100 = 8
101 = 12
110 = 24
111 = 48
When this bit is 1, acoustic enhancement is enabled on PWM2 output. When acoustic
enhancement is enabled, fan spin-up time should be disabled.
Rev. 3 | Page 49 of 56 | www.onsemi.com
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Time for 33% to 100%
35 sec
17.6 sec
11.8 sec
7 sec
4.4 sec
3 sec
1.6 sec
0.8 sec
Time for 33% to 100%
35 sec
17.6 sec
11.8 sec
7 sec
4.4 sec
3 sec
1.6 sec
0.8 sec
ADM1027