74VCX16838_05 FAIRCHILD [Fairchild Semiconductor], 74VCX16838_05 Datasheet
74VCX16838_05
Related parts for 74VCX16838_05
74VCX16838_05 Summary of contents
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Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs General Description The VCX16838 contains sixteen non-inverting selectable buffered or registered paths. The device can be configured to operate in a registered, or flow through buffer mode by ...
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Connection Diagram Logic Diagram www.fairchildsemi.com Truth Table Inputs I CLK REGE Logic HIGH L Logic LOW X ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( Outputs 3-STATE Outputs Active (Note 3) 0. Input Diode Current ( ...
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DC Electrical Characteristics (2. Symbol Parameter V HIGH Level Input Voltage IH V LOW Level Input Voltage IL V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current I I 3-STATE Output ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX Propagation Delay PHL PLH n n (REGE Propagation Delay CLK to O PHL PLH n (REGE ...
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AC Loading and Waveforms TEST PLH PHL PZL PLZ PZH PHZ FIGURE 2. Waveform for Inverting and Non-Inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...