ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 70
ATA6602-PLQW
Manufacturer Part Number
ATA6602-PLQW
Description
Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATA6602-PLQW.pdf
(362 pages)
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4.8.7
4.8.8
4.8.8.1
70
ATA6602/ATA6603
MCU Status Register – MCUSR
Internal Voltage Reference
Voltage Reference Enable Signals and Start-up Time
The MCU Status Register provides information on which reset source caused an MCU reset.
ATA6602/ATA6603 features an internal bandgap reference. This reference is used for
Brown-out Detection, and it can be used as an input to the Analog Comparator or the ADC.
The voltage reference has a start-up time that may influence the way it should be used. The
start-up time is given in
turned on. The reference is on during the following situations:
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user
must always allow the reference to start up before the output from the Analog Comparator or
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
• Bit 7..4: Res: Reserved Bits
• Bit 3 – WDRF: Watchdog System Reset Flag
• Bit 2 – BORF: Brown-out Reset Flag
• Bit 1 – EXTRF: External Reset Flag
• Bit 0 – PORF: Power-on Reset Flag
1. When the BOD is enabled (by programming the BODLEVEL [2..0] Fuses).
2. When the bandgap reference is connected to the Analog Comparator (by setting the
3. When the ADC is enabled.
Read/Write
Initial Value
These bits are unused bits in the ATA6602/ATA6603, and will always read as zero.
This bit is set if a Watchdog System Reset occurs. The bit is reset by a Power-on Reset, or
by writing a logic zero to the flag.
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writ-
ing a logic zero to the flag.
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing
a logic zero to the flag.
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the
flag.
To make use of the Reset Flags to identify a reset condition, the user should read and then
Reset the MCUSR as early as possible in the program. If the register is cleared before
another reset occurs, the source of the reset can be found by examining the Reset Flags.
Bit
ACBG bit in ACSR).
R
7
–
0
Table 4-23 on page
R
6
–
0
R
5
–
0
R
4
–
0
71. To save power, the reference is not always
WDRF
R/W
3
See Bit Description
BORF
R/W
2
EXTRF
R/W
1
PORF
R/W
4921C–AUTO–01/07
0
MCUSR
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