STA559BWQS13TR STMICROELECTRONICS [STMicroelectronics], STA559BWQS13TR Datasheet - Page 55

• Manufacturer Part Number: STA559BWQS13TR
• Description: 5-V, 2-A, 2.1-channel high-efficiency digital audio system with QSound QHD
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STA559BWQS
5.12.18
Writing a single coefficient to RAM
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Writing a set of coefficients to RAM
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The mechanism for writing a set of coefficients to RAM provides a method of updating the
five coefficients corresponding to a given biquad (filter) simultaneously to avoid possible
unpleasant acoustic side-effects. When using this technique, the 6-bit address would
specify the address of the biquad b1 coefficient (for example, 0, 5, 10, 20, 35 decimal), and
the STA559BWQS will generate the RAM addresses as offsets from this base value to write
the complete set of coefficient data.
User-defined EQ
The STA559BWQS provides the ability to specify four EQ filters (biquads) per each of the
two input channels. The biquads use the following equation:
where Y[n] represents the output and X[n] represents the input. Multipliers are 24-bit signed
fractional multipliers, with coefficient values in the range of 0x800000 (-1) to 0x7FFFFF
(0.9999998808).
write 6-bits of address to I
write top 8-bits of coefficient in I
write middle 8-bits of coefficient in I
write bottom 8-bits of coefficient in I
write 1 to W1 bit in I
write 6-bits of starting address to I
write top 8-bits of coefficient b1 in I
write middle 8-bits of coefficient b1 in I
write bottom 8-bits of coefficient b1 in I
write top 8-bits of coefficient b2 in I
write middle 8-bits of coefficient b2 in I
write bottom 8-bits of coefficient b2 in I
write top 8-bits of coefficient a1 in I
write middle 8-bits of coefficient a1 in I
write bottom 8-bits of coefficient a1 in I
write top 8-bits of coefficient a2 in I
write middle 8-bits of coefficient a2 in I
write bottom 8-bits of coefficient a2 in I
write top 8-bits of coefficient b0 in I
write middle 8-bits of coefficient b0 in I
write bottom 8-bits of coefficient b0 in I
write 1 to WA bit in I
Y[n] = 2(b
= b
0
X[n] + b
0
/2)X[n] + 2(b
1
X[n-1] + b
2
2
C address 0x26.
C address 0x26.
2
C register 0x16
2
1
X[n-2] - a
/2)X[n-1] + b
2
C address 0x17
2
2
2
2
2
2
C register 0x16
2
2
C address 0x17
C address 0x1A
C address 0x1D
C address 0x20
C address 0x23
C address 0x18
C address 0x19
1
2
2
2
2
2
2
2
2
2
2
Y[n-1] - a
C address 0x18
C address 0x1B
C address 0x1E
C address 0x21
C address 0x24
C address 0x19
C address 0x1C
C address 0x1F
C address 0x22
C address 0x25
2
X[n-2] - 2(a
2
Y[n-2]
1
/2)Y[n-1] - a
Register description
2
Y[n-2]
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