HD151BF854SSEL RENESAS [Renesas Technology Corp], HD151BF854SSEL Datasheet - Page 8

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HD151BF854SSEL

Manufacturer Part Number
HD151BF854SSEL
Description
2.5 V PLL Clock Buffer for DDR Application
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
HD151BF854
Absolute Maximum Ratings
Item
Supply voltage
Input voltage
Output voltage *
Input clamp current
Output clamp current
Continuous output current
Maximum power dissipation
at Ta = 55°C (in still air)
Storage temperature
Notes:
Recommended Operating Conditions
Item
Supply voltage
Output supply voltage
DC input signal voltage
High level input voltage
High level input voltage
Low level input voltage
Output differential cross point
voltage
Output current
Input clock slew rate
Operating temperature
Note: Unused inputs must be held high or low to prevent them from floating.
Rev.4, Jan. 2003, page 6 of 11
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
current ratings are observed.
1
Symbol
AVDD
VDD
V
V
V
V
I
I
SR
T
OH
OL
a
IH
IH
IL
OX
Symbol
VDD
V
V
V
I
I
I
T
IK
OK
O
stg
IC
I
O
Min
2.3
2.3
–0.3
1.7
1.7
–0.3
0.5 VDD
–0.2
1
0
Typ
2.5
2.5
Ratings
–0.5 to 3.6
–0.5 to 3.6
–0.5 to
VDD+0.5
–0.5 to
VDD+0.5
–50
–50
±50
0.7
–65 to +150
Max
2.7
2.7
VDD+0.3 V
3.6
VDD+0.3 V
0.7
0.5 VDD
+0.2
–12
12
70
Unit
V
V
V
V
mA
mA
mA
W
°C
Unit Conditions
V
V
V
V
V
mA
V/ns
°C
All pins
CLKIN
FBIN
CLKIN, FBIN
Conditions
CLKIN
V
V
V
I
O
O
< 0
< 0
= 0 to VDD

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