STK15C68-SF25I SIMTEK [Simtek Corporation], STK15C68-SF25I Datasheet - Page 9

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STK15C68-SF25I

Manufacturer Part Number
STK15C68-SF25I
Description
32Kx8 PowerStore nvSRAM
Manufacturer
SIMTEK [Simtek Corporation]
Datasheet
Document Control #ML0016 Rev 0.3
Internally,
the
tile information is transferred into the
After the t
be ready for
RECALL
nonvolatile elements. The nonvolatile data can be
recalled an unlimited number of times.
AutoStore
The STK15C88 uses the intrinsic system capaci-
tance to perform an automatic
down. As long as the system power supply takes at
least t
STK15C88 will safely and automatically store the
SRAM
In order to prevent unneeded
automatic
one
most recent
initiated
whether a
tional information may be found in applications note
“Applying
STK16C88 32K nvSRAM.”
POWER-UP RECALL
During power up, or after any low-power condition
(V
latched. When V
voltage of V
be initiated and will take t
If the STK15C88 is in a
power-up
CC
SRAM
February, 2007
100
WRITE
< V
80
60
40
20
STORE
data in nonvolatile elements on power down.
0
STORE
operation in no way alters the data in the
RESET
RECALL
RECALL
data is cleared, and second, the nonvola-
RECALL
STORE
WRITE
to decay from V
SWITCH
the
operation has taken place since the
), an internal
TM
Figure 2: I
STORE
READ
cycle time the
50
cycles are performed regardless of
, a
CC
OPERATION
s will be ignored unless at least
, the
operation has taken place. Addi-
STK11C88,
is a two-step procedure. First,
once again exceeds the sense
RECALL
Cycle Time (ns)
and
or
100
SRAM
CC
WRITE
RESTORE
RECALL
(max) Reads
WRITE
RECALL
SWITCH
cycle will automatically
data will be corrupted.
SRAM
150
STORE
to complete.
state at the end of
TTL
CMOS
STORE
STK15C88
down to 3.6V, the
cycle. Software-
operations. The
request will be
will once again
200
SRAM
operations,
on power
cells.
and
9
To help avoid this situation, a 10K Ohm resistor
should be connected either between W and system
V
HARDWARE PROTECT
The STK15C88 offers hardware protection against
inadvertent
during low-voltage conditions. When V
all software
are inhibited.
LOW AVERAGE ACTIVE POWER
The STK15C88 draws significantly less current
when it is cycled at times longer than 50ns. Figure 2
shows the relationship between I
time. Worst-case current consumption is shown for
both
perature range, V
enable). Figure 3 shows the same relationship for
WRITE
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK15C88 depends on the following items:
1)
chip enable; 3) the overall cycle rate for accesses;
4) the ratio of
temperature; 6) the V
CC
CMOS
or between E and system V
CMOS
100
Figure 3: I
80
60
40
20
cycles. If the chip enable duty cycle is less
0
vs.
and
STORE
STORE
TTL
READ
CC
50
TTL
CC
input levels; 2) the duty cycle of
(max) Writes
= 5.5V, 100% duty cycle on chip
operations and
operation and
s to
input levels (commercial tem-
CC
Cycle Time (ns)
100
level; and 7) I/O loading.
WRITE
150
CC
s; 5) the operating
TTL
CMOS
CC
.
and
SRAM WRITE
SRAM WRITE
200
STK15C88
CC
READ
< V
SWITCH
cycle
s
s
,

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