E28F004BX-B120 INTEL [Intel Corporation], E28F004BX-B120 Datasheet - Page 16

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E28F004BX-B120

Manufacturer Part Number
E28F004BX-B120
Description
4-MBIT (256K X 16, 512K X 8) BOOT BLOCK FLASH MEMORY FAMILY
Manufacturer
INTEL [Intel Corporation]
Datasheet

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E28F004BX-B120
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28F400BX-T B 28F004BX-T B
3 1 2 2 28F004BX-T Memory Map
The 28F004BX-T device has the 16-Kbyte boot
block located from 7C000H to 7FFFFH to accom-
modate those microprocessors that boot from the
top of the address map In the 28F004BX-T the first
8-Kbyte parameter block resides in memory space
from 7A000H to 7BFFFH The second 8-Kbyte pa-
rameter block resides in memory space from
78000H to 79FFFH The 96-Kbyte main block re-
sides in memory space from 60000H to 77FFFH
The three 128-Kbyte main blocks reside in memory
space from 40000H to 5FFFFH 20000H to 3FFFFH
and 00000H to 1FFFFH
16
Figure 11 28F004BX-T Memory Map
7BFFFH
7FFFFH
7C000H
79FFFH
77FFFH
5FFFFH
3FFFFH
1FFFFH
7A000H
78000H
60000H
40000H
20000H
00000H
8-Kbyte PARAMETER BLOCK
8-Kbyte PARAMETER BLOCK
128-Kbyte MAIN BLOCK
128-Kbyte MAIN BLOCK
128-Kbyte MAIN BLOCK
16-Kbyte BOOT BLOCK
96-Kbyte MAIN BLOCK
4 0 PRODUCT FAMILY PRINCIPLES
Flash memory augments EPROM functionality with
in-circuit electrical write and erase The 4-Mbit flash
family utilizes a Command User Interface (CUI) and
internally generated and timed algorithms to simplify
write and erase operations
The CUI allows for 100% TTL-level control inputs
fixed power supplies during erasure and program-
ming and maximum EPROM compatibility
In the absence of high voltage on the V
4-Mbit boot block flash family will only successfully
execute the following commands Read Array Read
Status Register Clear Status Register and Intelli-
gent Identifier mode The device provides standard
EPROM read standby and output disable opera-
tions Manufacturer Identification and Device Identi-
fication data can be accessed through the CUI or
through the standard EPROM A
cess (V
The same EPROM read standby and output disable
functions are available when high voltage is applied
to the V
lows write and erase of the device All functions as-
sociated with altering memory contents write and
erase Intelligent Identifier read and Read Status are
accessed via the CUI
The purpose of the Write State Machine (WSM) is to
completely automate the write and erasure of the
device The WSM will begin operation upon receipt
of a signal from the CUI and will report status back
through a Status Register The CUI will handle the
WE
well as system software requests for status while the
WSM is in operation
4 1 28F400BX Bus Operations
Flash memory reads erases and writes in-system
via the local CPU All bus cycles to or from the flash
memory conform to standard microprocessor bus
cycles
interface to the data and address latches as
OF OPERATION
ID
PP
) for PROM programming equipment
pin In addition high voltage on V
9
high voltage ac-
PP
pin the
PP
al-

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