L6258EP_07

Manufacturer Part NumberL6258EP_07
DescriptionPWM controlled high current DMOS universal motor driver
ManufacturerSTMICROELECTRONICS [STMicroelectronics]
L6258EP_07 datasheet
 


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Features
Able to drive both windings of a bipolar stepper
motor or two DC motors
Output current up to 1.3A each winding
Wide voltage range: 12V to 40V
Four quadrant current control, ideal for
microstepping and DC motor control
Precision PWM control
No need for recirculation diodes
TTL/CMOS compatible inputs
Cross conduction protection
Thermal shutdow
Description
L6258EP is a dual full bridge for motor control
applications realized in BCD technology, with the
capability of driving both windings of a bipolar
stepper motor or bidirectionally control two DC
motors.
L6258EP and a few external components form a
complete control and drive circuit. It has high
efficiency phase shift chopping that allows a very
low current ripple at the lowest current control
levels, and makes this device ideal for steppers as
well as for DC motors.
Table 1.
Device summary
Order code
E-L6258EP
December 2007
high current DMOS universal motor driver
The power stage is a dual DMOS full bridge
capable of sustaining up to 40V, and includes the
diodes for current recirculation. The output current
capability is 1.3A per winding in continuous mode,
with peak start-up current up to 2A. A thermal
protection circuitry disables the outputs if the chip
temperature exceeds the safe limits.
Package
PowerSSO36
Rev 4
L6258EP
PWM controlled
PowerSSO36
Packing
Tube
1/32
www.st.com
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L6258EP_07 Summary of contents

  • Page 1

    Features ■ Able to drive both windings of a bipolar stepper motor or two DC motors ■ Output current up to 1.3A each winding ■ Wide voltage range: 12V to 40V ■ Four quadrant current control, ideal for microstepping and ...

  • Page 2

    Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

  • Page 3

    L6258EP List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

  • Page 4

    List of figures List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

  • Page 5

    L6258EP 1 Block diagram Figure 1. Block diagram C VCP2 P VCP1 CHARGE PUMP VREF1 I3_1 I2_1 DAC I1_1 I0_1 PH_1 V (5V) VR GEN DD VREF1 I3_2 I2_2 DAC I1_2 I0_2 PH_2 TRI_CAP TRI_0 TRIANGLE GENERATOR TRI_180 C FREF ...

  • Page 6

    Block diagram Figure 2. Pin connection (top view) PWR_GND OUT1A DISABLE TRI_CAP VCP1 VCP2 VBOOT OUT2A PWR_GND Table 3. Pin functions Pin # 6/ PH_1 3 I1_1 4 I0_1 ...

  • Page 7

    L6258EP Table 3. Pin functions (continued) Pin # 13 18 Note: The number in parenthesis ...

  • Page 8

    Block diagram Table 4. Electrical characteristics (V S Parameter V Supply voltage S V Logic supply voltage DD V Storage voltage BOOT Max drop across sense V Sense resistor V Power off reset S(off) V Power off reset DD(off) I ...

  • Page 9

    L6258EP Table 4. Electrical characteristics (continued Parameter I Input bias inp ERROR AMPLIFIER G Open loop voltage gain V SR Output slew rate Gain bandwidth GBW product 1. Chopping frequency is twice fosc value. 2. This is true ...

  • Page 10

    Functional description 2 Functional description The circuit is intended to drive both windings of a bipolar stepper motor or two DC motors. The current control is generated through a switch mode regulation. With this system the direction and the amplitude ...

  • Page 11

    L6258EP 2.1 Reference voltage The voltage applied to VREF pin is the reference for the internal DAC and, together with the sense resistor value, defines the maximum current into the motor winding according to the following relation: where R = ...

  • Page 12

    Functional description Figure 4. Current control loop block diagram INPUT TRANSCONDUCTANCE AMPL. ia VREF VDAC DAC - Gin=1/Ra 2.2 Input logic (I The current level in the motor winding is selected according to this ...

  • Page 13

    L6258EP Table 5. Current levels (continued 2.3 Phase input ( PH ) The logic level applied to this input determines the direction of the current flowing in the winding of the motor. High level ...

  • Page 14

    Functional description 2.6 Current control loop The current control loop is a transconductance amplifier working in PWM mode. The motor current is a function of the programmed DAC voltage. To keep under control the output current, the current control modulates ...

  • Page 15

    L6258EP With a positive differential voltage on V positively unbalanced respected Vr. In this case being the error amplifier output voltage greater than Vr, the output of the first comparator is a square wave with a duty cycle higher than ...

  • Page 16

    PWM current control loop 3 PWM current control loop 3.1 Open loop transfer function analysis Block diagram: refer to Input parameters: ● 24V S ● 12mH L ● 12Ω L ● 0.33Ω ...

  • Page 17

    L6258EP Gain and bandwidth must be chosen depending on many parameters of the application, like the characteristics of the load, power supply etc..., and most important is the stability of the system that must always be guaranteed. To have a ...

  • Page 18

    PWM current control loop Moreover, having the two references Tri_0 and Tri_180 a triangular shape it is clear that the transfer function of this block is a linear constant gain without poles and zeros. 3.3 Load attenuation The load block ...

  • Page 19

    L6258EP Before analysing the error amplifier block and the sense transconductance block, we have to do this consideration: Aloop = Ax| = ACpw and Bx| = ACerr this means that Ax|dB ...

  • Page 20

    PWM current control loop because ib = icwe have: In the case of no external RC network is used to compensate the error amplifier, the typical open loop transfer function of the error plus the sense amplifier is something with ...

  • Page 21

    L6258EP In this case the Bx block has a DC gain equal to the open loop and equal to zero at a frequency given by the following formula: In order to cancel the pole of the load, the zero of ...

  • Page 22

    PWM current control loop Figure 8. Aloop bode plot (compensated) We can see that the effect of the load pole is cancelled by the zero of the Bx block ; the total Aloop cross a the 0dB axis with a ...

  • Page 23

    L6258EP Figure 9. Electrical model of the load OUT+ OUT- The schematic now shows the equivalent circuit of the stepper motor including a sine wave voltage generator of the Bemf. The Bemf voltage of the motor is not constant, its ...

  • Page 24

    Application information 4 Application information A typical application circuit is shown in Note: For avoid current spikes on falling edge of DISABLE a "DC feedback" would be added to the ERROR Amplifier. (R1-R2 on 4.1 Interference Due to the fact ...

  • Page 25

    L6258EP Figure 10. Typical application circuit 10nF VBOOT 100nF VS TRI_CAP 1nF DISABLE 4.2 Motor selection Some stepper motor have such high core losses that they are not suitable for switch mode current regulation. Furthermore, some stepper motors are not ...

  • Page 26

    Application information 4.4 Notes on PCB design We recommend to observe the following layout rules to avoid application problems with ground and anomalous recirculation current. The by-pass capacitors for the power and logic supply must be kept as near as ...

  • Page 27

    L6258EP 5 Operation mode time diagrams Figure 11. Full step operation mode timing diagram (Phase - DAC input and motor current) Position 0 5V Phase Phase I0_1 0 5V I1_1 0 DAC 1 Inputs ...

  • Page 28

    Operation mode time diagrams Figure 12. Half step operation mode timing diagram (Phase - DAC input and motor current) Phase 1 Phase 2 I0_1 DAC 1 I1_1 Inputs I2_1 I3_1 I0_2 I1_2 DAC 2 Inputs I2_2 I3_2 100% 71.4% Motor ...

  • Page 29

    L6258EP Figure 13. 4 bit microstep operation mode timing diagram (Phase - DAC input and motor current) Position Phase Phase 5V 2 I0_1 0 5V I1_1 0 DAC 1 Inputs 5V I2_1 0 5V ...

  • Page 30

    Package information 6 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the ...

  • Page 31

    L6258EP 7 Revision history Table 7. Document revision history Date 10-Feb-2005 23-Mar-2005 27-Jul-2005 03-Dec-2007 Revision 1 First Issue in the EDOCS DMS. 2 Modified the note “(1)” of the Changed the maturity from Preliminary data to datasheet. 3 Modified in ...

  • Page 32

    Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any ...