AT32UC3L064_11 ATMEL [ATMEL Corporation], AT32UC3L064_11 Datasheet - Page 92

• Manufacturer Part Number: AT32UC3L064_11
• Description: 32-bit Atmel AVR Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

10.4.5
10.4.6
32099HS–12/2011
HMATRIX
Power Manager
2. Open Mode is not functional
3. VERSION register reads 0x100
1. In the PRAS and PRBS registers, the MxPR fields are only two bits
1. CONFIG register reads 0x4F
2. It is not possible to mask the request clock requests
3. Static mode cannot be entered if the WDT is using OSC32
4. Clock Failure Detector (CFD) does not work
5. WCAUSE register should not be used
6. PB writes via debugger in sleep modes are blocked during sleepwalking
Fix/Workaround
None.
The Open Mode is not functional.
Fix/Workaround
None.
The VERSION register reads 0x100 instead of 0x110.
Fix/Workaround
None.
In the PRAS and PRBS registers, the MxPR fields are only two bits wide, instead of four bits.
The unused bits are undefined when reading the registers.
Fix/Workaround
Mask undefined bits when reading PRAS and PRBS.
The CONFIG register reads 0x4F instead of 0x43.
Fix/Workaround
None.
It is not possible to mask the request clock requests using PPCR.
Fix/Workaround
None.
If the WDT is using OSC32 as clock source and the user tries to enter Static mode, the
Deepstop mode will be entered instead.
Fix/Workaround
None.
Clock Failure Detector (CFD) does not work.
Fix/Workaround
None.
The WCAUSE register should not be used.
Fix/Workaround
None.
During sleepwalking, PB writes performed by a debugger will be discarded by all PB mod-
ules except the module that is requesting the clock.
Fix/Workaround
AT32UC3L016/32/64
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