P89LPC915FDH NXP [NXP Semiconductors], P89LPC915FDH Datasheet

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P89LPC915FDH

Manufacturer Part Number
P89LPC915FDH
Description
8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V flash with 8-bit A/D converter
Manufacturer
NXP [NXP Semiconductors]
Datasheets

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1. General description
2. Features
2.1 Principal features
2.2 Additional features
The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages,
based on a high performance processor architecture that executes instructions in two to
four clocks, six times the rate of standard 80C51 devices. Many system-level functions
have been incorporated into the P89LPC915/916/917 in order to reduce component
count, board space, and system cost.
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P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
2 kB 3 V flash with 8-bit A/D converter
Rev. 05 — 15 December 2009
2 kB byte-erasable flash code memory organized into 256-byte sectors and 16-byte
pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
256-byte RAM data memory.
Two 16-bit counter/timers. Timer 0 (and Timer 1 - P89LPC917) may be configured to
toggle a port output upon timer overflow or to become a PWM output.
23-bit system timer that can also be used as a Real-Time clock.
4-input multiplexed 8-bit A/D converter/single DAC output. Two analog comparators
with selectable reference.
Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities.
SPI communication port (P89LPC916).
Internal RC oscillator option allows operation without external oscillator components.
The RC oscillator (factory calibrated to 1 %) option is selectable and fine tunable.
2.4 V to 3.6 V V
driven to 5.5 V).
Up to 14 I/O pins when using internal oscillator and reset options (P89LPC916,
P89LPC917).
14-pin (P89LPC915) and 16-pin (P89LPC916, P89LPC917) TSSOP packages.
A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
for all instructions except multiply and divide when executing at 18 MHz. This is six
times the performance of the standard 80C51 running at the same clock frequency. A
lower clock frequency for the same performance results in power savings and reduced
EMI.
In-Application Programming (IAP-Lite) and byte erase allows code memory to be used
for non-volatile data storage.
DD
operating range. I/O pins are 5 V tolerant (may be pulled up or
Product data sheet

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