P89LV51RD2BA PHILIPS [NXP Semiconductors], P89LV51RD2BA Datasheet - Page 38

• Manufacturer Part Number: P89LV51RD2BA
• Description: 8-bit 80C51 3 V low power 64 kB Flash microcontroller with 1 kB RAM
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
9397 750 14342
Product data
7.5.1 Mode 0
7.5.2 Mode 1
7.5.3 Mode 2
7.5.4 Mode 3
Serial data enters and exits through RxD and TxD outputs the shift clock. Only 8 bits
are transmitted or received, LSB first. The baud rate is fixed at
frequency. UART configured to operate in this mode outputs serial clock on TxD line
no matter whether it sends or receives data on RxD line.
10 bits are transmitted (through TxD) or received (through RxD): a start bit (logical 0),
8 data bits (LSB first), and a stop bit (logical 1). When data is received, the stop bit is
stored in RB8 in Special Function Register SCON. The baud rate is variable and is
determined by the Timer
11 bits are transmitted (through TxD) or received (through RxD): start bit (logical 0), 8
data bits (LSB first), a programmable 9th data bit, and a stop bit (logical 1). When
data is transmitted, the 9th data bit (TB8 in SCON) can be assigned the value of 0 or
(e.g. the parity bit (P, in the PSW) could be moved into TB8). When data is received,
the 9th data bit goes into RB8 in Special Function Register SCON, while the stop bit
is ignored. The baud rate is programmable to either
frequency, as determined by the SMOD1 bit in PCON.
11 bits are transmitted (through TxD) or received (through RxD): a start bit (logical 0),
8 data bits (LSB first), a programmable 9th data bit, and a stop bit (logical 1). In fact,
Mode 3 is the same as Mode 2 in all respects except baud rate. The baud rate in
Mode 3 is variable and is determined by the Timer
Table 25:
Bit addressable; Reset value: 00H
Table 26:
Bit
7
6
5
4
Bit
Symbol SM0/FE
SCON - Serial port control register (address 98H) bit allocation
SCON - Serial port control register (address 98H) bit description
Symbol
SM0/FE
SM1
SM2
REN
7
Rev. 04 — 02 December 2004
SM1
6
Description
The usage of this bit is determined by SMOD0 in the PCON
register. If SMOD0 = 0, this bit is SM0, which with SM1, defines
the serial port mode. If SMOD0 = 1, this bit is FE (Framing Error).
FE is set by the receiver when an invalid stop bit is detected. Once
set, this bit cannot be cleared by valid frames but can only be
cleared by software. (Note: It is recommended to set up UART
mode bits SM0 and SM1 before setting SMOD0 to ‘1’.)
With SM0, defines the serial port mode (see
Enables the multiprocessor communication feature in Modes 2 and
3. In Mode 2 or 3, if SM2 is set to ‘1’, then Rl will not be activated if
the received 9th data bit (RB8) is ‘0’. In Mode 1, if SM2 = 1 then RI
will not be activated if a valid stop bit was not received. In Mode 0,
SM2 should be ‘0’.
Enables serial reception. Set by software to enable reception.
Clear by software to disable reception.
1
2
overflow rate.
SM2
5
P89LV51RB2/RC2/RD2
REN
4
8-bit microcontrollers with 80C51 core
TB8
1
3
1
2
16
overflow rate.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
or
RB8
1
32
2
of the CPU clock
1
6
Table 27
of the CPU clock
TI
1
below).
RI
38 of 77
0