P89LV51RD2BA PHILIPS [NXP Semiconductors], P89LV51RD2BA Datasheet - Page 46

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P89LV51RD2BA

Manufacturer Part Number
P89LV51RD2BA
Description
8-bit 80C51 3 V low power 64 kB Flash microcontroller with 1 kB RAM
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheets

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Product data
Fig 21.
Module functions:
16-bit capture
16-bit timer
16-bit high speed output
8-bit PWM
Watchdog timer (Module 4 only)
7.8 Programmable Counter Array (PCA)
time base for PCA modules
PCA TIMER/COUNTER
Table 36:
The PCA includes a special 16-bit Timer that has five 16-bit capture/compare
modules associated with it. Each of the modules can be programmed to operate in
one of four modes: rising and/or falling edge capture, software timer, high-speed
output, or pulse width modulator. Each module has a pin associated with it in port 1.
Module 0 is connected to P1.3 (CEX0), module 1 to P1.4 (CEX1), etc. Registers CH
and CL contain current value of the free running up counting 16-bit PCA timer. The
PCA timer is a common time base for all five modules and can be programmed to run
at:
input on the ECI pin (P1.2). The timer count source is determined from the CPS1 and
CPS0 bits in the CMOD SFR (see
In the CMOD SFR there are three additional bits associated with the PCA. They are
CIDL which allows the PCA to stop during idle mode, WDTE which enables or
disables the Watchdog function on module 4, and ECF which when set causes an
interrupt and the PCA overflow flag CF (in the CCON SFR) to be set when the PCA
timer overflows.
Bit
7 to 5
4
3
2
1
0
16 bits
1
6
the oscillator frequency,
WDTC - Watchdog control register (address COH) bit description
Symbol
-
WDOUT
WDRE
WDTS
WDT
SWDT
Rev. 04 — 02 December 2004
Description
Reserved for future use. Should be set to
Watchdog output enable. When this bit and WDRE are both set, a
Watchdog reset will drive the reset pin active for 32 clocks.
Watchdog timer reset enable. When set enables a Watchdog timer
reset.
Watchdog timer reset flag, when set indicates that a WDT reset
occurred. Reset in software.
Watchdog timer refresh. Set by software to force a WDT reset.
Start Watchdog timer, when set starts the WDT. When cleared,
stops the WDT.
MODULE0
MODULE1
MODULE2
MODULE3
MODULE4
1
16 bits
2
the oscillator frequency, the Timer 0 overflow, or the
Table 37
P89LV51RB2/RC2/RD2
and
8-bit microcontrollers with 80C51 core
Table
P1.3/CEX0
P1.4/CEX1
P1.5/CEX2
P1.6/CEX3
P1.7/CEX4
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
38).
‘0’
002aaa532
by user programs.
46 of 77

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