LPC2144 NXP [NXP Semiconductors], LPC2144 Datasheet - Page 11

• Manufacturer Part Number: LPC2144
• Description: Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 3.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
LPC2141_42_44_46_48_3
Product data sheet
Symbol
P1.28/TDI
P1.29/TCK
P1.30/TMS
P1.31/TRST
D+
D
RESET
XTAL1
XTAL2
RTCX1
RTCX2
V
V
V
V
VREF
VBAT
SS
SSA
DD
DDA
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control. If configured for an input
function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns.
Open-drain 5 V tolerant digital I/O I
functionality.
5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog input function. If configured
for an input function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns. When configured as an ADC input, digital
section of the pad is disabled.
5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog output function. When
configured as the DAC output, digital section of the pad is disabled.
5 V tolerant pad with built-in pull-up resistor providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
The pull-up resistor’s value typically ranges from 60 k to 300 k .
Pad is designed in accordance with the Universal Serial Bus (USB) specification, revision 2.0 (Full-speed and Low-speed mode only).
5 V tolerant pad providing digital input (with TTL levels and hysteresis) function only.
Pad provides special analog functionality.
Pin description
Pin
60
56
52
20
10
11
57
62
61
3
5
6, 18, 25, 42,
50
59
23, 43, 51
7
63
49
[9]
[9]
[6]
[6]
[6]
[6]
[7]
[7]
[8]
[9]
[9]
…continued
Type
I/O
I
I/O
I
I/O
I
I/O
I
I/O
I/O
I
I
O
I
O
I
I
I
I
I
I
2
C-bus 400 kHz specification compatible pad. It requires external pull-up to provide an output
Description
P1.28 — General purpose input/output digital pin (GPIO)
TDI — Test Data in for JTAG interface
P1.29 — General purpose input/output digital pin (GPIO)
TCK — Test Clock for JTAG interface
P1.30 — General purpose input/output digital pin (GPIO)
TMS — Test Mode Select for JTAG interface
P1.31 — General purpose input/output digital pin (GPIO)
TRST — Test Reset for JTAG interface
USB bidirectional D+ line
USB bidirectional D line
External reset input: A LOW on this pin resets the device, causing I/O ports
and peripherals to take on their default states, and processor execution to
begin at address 0, TTL with hysteresis, 5 V tolerant
Input to the oscillator circuit and internal clock generator circuits
Output from the oscillator amplifier
Input to the RTC oscillator circuit
Output from the RTC oscillator circuit
Ground: 0 V reference
Analog ground: 0 V reference, this should nominally be the same voltage as
V
3.3 V power supply: This is the power supply voltage for the core and I/O
ports
Analog 3.3 V power supply: This should be nominally the same voltage as
V
used to power the on-chip ADC(s) and DAC
ADC reference voltage: This should be nominally less than or equal to the
V
pin is used as a reference for ADC(s) and DAC
RTC power supply voltage: 3.3 V on this pin supplies the power to the RTC
SS
DD
DD
Rev. 03 — 19 October 2007
, but should be isolated to minimize noise and error
but should be isolated to minimize noise and error, this voltage is only
voltage but should be isolated to minimize noise and error, level on this
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
© NXP B.V. 2007. All rights reserved.
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