LPC2468_08 NXP [NXP Semiconductors], LPC2468_08 Datasheet

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LPC2468_08

Manufacturer Part Number
LPC2468_08
Description
Single-chip 16-bit/32-bit micro; 512 kB flash, Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1. General description
2. Features
NXP Semiconductors designed the LPC2468 microcontroller around a 16-bit/32-bit
ARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG and
embedded trace. The LPC2468 has 512 kB of on-chip high-speed flash memory. This
flash memory includes a special 128-bit wide memory interface and accelerator
architecture that enables the CPU to execute sequential instructions from flash memory at
the maximum 72 MHz system clock rate. This feature is available only on the LPC2000
ARM microcontroller family of products. The LPC2468 can execute both 32-bit ARM and
16-bit Thumb instructions. Support for the two instruction sets means engineers can
choose to optimize their application for either performance or code size at the sub-routine
level. When the core executes instructions in Thumb state it can reduce code size by more
than 30 % with only a small loss in performance while executing instructions in ARM state
maximizes core performance.
The LPC2468 microcontroller is ideal for multipurpose communication applications. It
incorporates a 10/100 Ethernet Media Access Controller (MAC), a USB full-speed
Device/Host/OTG Controller with 4 kB of endpoint RAM, four UARTs, two Controller Area
Network (CAN) channels, an SPI interface, two Synchronous Serial Ports (SSP), three I
interfaces, and an I
interfaces are the following feature components; an on-chip 4 MHz internal precision
oscillator, 98 kB of total RAM consisting of 64 kB of local SRAM, 16 kB SRAM for
Ethernet, 16 kB SRAM for general purpose DMA, 2 kB of battery powered SRAM, and an
External Memory Controller (EMC). These features make this device optimally suited for
communication gateways and protocol converters. Complementing the many serial
communication controllers, versatile clocking capabilities, and memory features are
various 32-bit timers, an improved 10-bit ADC, 10-bit DAC, two PWM units, four external
interrupt pins, and up to 160 fast GPIO lines. The LPC2468 connects 64 of the GPIO pins
to the hardware based Vector Interrupt Controller (VIC) that means these external inputs
can generate edge-triggered interrupts. All of these features make the LPC2468
particularly suitable for industrial control and medical systems.
I
I
I
LPC2468
Single-chip 16-bit/32-bit micro; 512 kB flash, Ethernet, CAN,
ISP/IAP, USB 2.0 device/host/OTG, external memory interface
Rev. 04 — 17 October 2008
ARM7TDMI-S processor, running at up to 72 MHz.
512 kB on-chip flash program memory with In-System Programming (ISP) and
In-Application Programming (IAP) capabilities. Flash program memory is on the ARM
local bus for high performance CPU access.
98 kB on-chip SRAM includes:
N
N
64 kB of SRAM on the ARM local bus for high performance CPU access.
16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
2
S interface. Supporting this collection of serial communications
Product data sheet
2
C

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LPC2468_08 Summary of contents

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LPC2468 Single-chip 16-bit/32-bit micro; 512 kB flash, Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface Rev. 04 — 17 October 2008 1. General description NXP Semiconductors designed the LPC2468 microcontroller around a 16-bit/32-bit ARM7TDMI-S CPU core with real-time debug ...

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NXP Semiconductors SRAM for general purpose DMA use also accessible by the USB SRAM data storage powered from the Real-Time Clock (RTC) power domain. I Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet ...

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NXP Semiconductors I Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt, CAN bus activity, port 0/2 pin interrupt). I Two independent power domains allow ...

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NXP Semiconductors 5. Block diagram LPC2468 P0, P1, P2, P3, P4 HIGH-SPEED GPIO 160 PINS TOTAL AHB2 ETHERNET MII/RMII MAC WITH DMA EINT3 to EINT0 EXTERNAL INTERRUPTS P0 CAP0/CAP1/ CAPTURE/COMPARE CAP2/CAP3 TIMER0/TIMER1/ 4 MAT2/MAT3, TIMER2/TIMER3 2 MAT0, 3 ...

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NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. LPC2468 pinning LQFP208 package Fig 3. LPC2468 pinning TFBGA208 package Table 3. Pin allocation table Pin Symbol Pin Symbol Row A 1 P3[27]/D27/ 2 CAP1[0]/PWM1[4] 5 P1[4]/ENET_TX_EN 6 9 P1[17]/ENET_MDIO 10 ...

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NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol 17 P1[5]/ENET_TX_ER/ MCIPWR/PWM0[3] Row B 1 P3[2]/ P1[1]/ENET_TXD1 6 9 P4[25]/ DD(3V3) 17 P2[0]/PWM1[1]/TXD1/ TRACECLK Row C 1 P3[13]/D13 2 5 P3[9]/D9 6 ...

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NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol Row H 1 P0[23]/AD0[0]/ 2 I2SRX_CLK/CAP3[ SSIO Row J 1 P3[6]/ P0[16]/RXD1/ 15 SSEL0/SSEL Row K 1 VREF 2 14 P4[22]/A22/ 15 TXD2/MISO1 Row ...

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NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol 13 P2[17]/RAS 14 17 P4[20]/A20/ SDA2/SCK1 Row T 1 P0[27]/SDA0 SSIO 9 P1[24]/USB_RX_DM1/ 10 PWM1[5]/MOSI0 13 P1[28]/USB_SCL1/ 14 PCAP1[0]/MAT0[0] 17 P2[11]/EINT1/ MCIDAT1/I2STX_CLK Row U 1 ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P0[3]/RXD0 204 D6 [1] P0[4]/ 168 B12 I2SRX_CLK/ RD2/CAP2[0] [1] P0[5]/ 166 C12 I2SRX_WS/ TD2/CAP2[1] [1] P0[6]/ 164 D13 I2SRX_SDA/ SSEL1/MAT2[0] [1] P0[7]/ 162 C13 I2STX_CLK/ SCK1/MAT2[1] [1] P0[8]/ ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [2] P0[12 USB_PPWR2/ MISO1/AD0[6] [2] P0[13 USB_UP_LED2/ MOSI1/AD0[7] [1] P0[14 USB_HSTEN2/ USB_CONNECT2/ SSEL1 [1] P0[15]/TXD1/ 128 J16 SCK0/SCK [1] P0[16]/RXD1/ 130 J14 SSEL0/SSEL [1] ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P0[21]/RI1/ 118 M16 MCIPWR/RD1 [1] P0[22]/RTS1/ 116 N17 MCIDAT0/TD1 [2] P0[23]/AD0[0 I2SRX_CLK/ CAP3[0] [2] P0[24]/AD0[1 I2SRX_WS/ CAP3[1] [2] P0[25]/AD0[2 I2SRX_SDA/ TXD3 [2][3] P0[26]/AD0[3]/ ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P1[0]/ 196 A3 ENET_TXD0 [1] P1[1]/ 194 B5 ENET_TXD1 [1] P1[2]/ 185 D9 ENET_TXD2/ MCICLK/ PWM0[1] [1] P1[3]/ 177 A10 ENET_TXD3/ MCICMD/ PWM0[2] [1] P1[4]/ 192 A5 ENET_TX_EN [1] ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P1[13]/ 147 D16 ENET_RX_DV [1] P1[14]/ 184 A7 ENET_RX_ER [1] P1[15]/ 182 A8 ENET_REF_CLK/ ENET_RX_CLK [1] P1[16]/ 180 D10 ENET_MDC [1] P1[17]/ 178 A9 ENET_MDIO [1] P1[18 ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P1[24 USB_RX_DM1/ PWM1[5]/MOSI0 [1] P1[25]/ 80 T10 USB_LS1/ USB_HSTEN1/ MAT1[1] [1] P1[26]/ 82 R10 USB_SSPND1/ PWM1[6]/ CAP0[0] [1] P1[27]/ 88 T12 USB_INT1/ USB_OVRCR1/ CAP0[1] [1] P1[28]/ 90 ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P2[1]/PWM1[2]/ 152 E14 RXD1/ PIPESTAT0 [1] P2[2]/PWM1[3]/ 150 D15 CTS1/ PIPESTAT1 [1] P2[3]/PWM1[4]/ 144 E16 DCD1/ PIPESTAT2 [1] P2[4]/PWM1[5]/ 142 D17 DSR1/ TRACESYNC [1] P2[5]/PWM1[6]/ 140 F16 DTR1/ TRACEPKT0 ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [6] P2[11]/EINT1/ 108 T17 MCIDAT1/ I2STX_CLK [6] P2[12]/EINT2/ 106 N14 MCIDAT2/ I2STX_WS [6] P2[13]/EINT3/ 102 T16 MCIDAT3/ I2STX_SDA [6] P2[14]/CS2/ 91 R12 CAP2[0]/SDA1 [6] P2[15]/CS3/ 99 P13 CAP2[1]/SCL1 [1] P2[16]/CAS ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P2[23]/DYCS3 CAP3[1]/SSEL0 [1] P2[24 CKEOUT0 [1] P2[25 CKEOUT1 [1] P2[26 CKEOUT2/ MAT3[0]/MISO0 [1] P2[27 CKEOUT3/ MAT3[1]/MOSI0 [1] P2[28]/ 49 ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P3[5]/ [1] P3[6]/ [1] P3[7]/ [1] P3[8]/D8 191 D8 [1] P3[9]/D9 199 C5 [1] P3[10]/D10 205 B2 [1] P3[11]/D11 208 D5 [1] P3[12]/D12 ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P3[20]/D20/ 167 A13 PWM0[5]/DSR1 [1] P3[21]/D21/ 175 C10 PWM0[6]/DTR1 [1] P3[22]/D22/ 195 C6 PCAP0[0]/RI1 [1] P3[23]/D23 CAP0[0]/ PCAP1[0] [1] P3[24]/D24 CAP0[1]/ PWM1[1] [1] P3[25]/D25/ 56 ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P3[30]/D30 MAT1[1]/ RTS1 [1] P3[31]/D31 MAT1[2] P4[0] to P4[31] [1] P4[0]/ [1] P4[1]/A1 79 U10 [1] P4[2]/A2 83 T11 [1] P4[3]/A3 97 U16 ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P4[15]/A15 173 A11 [1] P4[16]/A16 101 U17 [1] P4[17]/A17 104 P14 [1] P4[18]/A18 105 P15 [1] P4[19]/A19 111 P16 [1] P4[20]/A20/ 109 R17 SDA2/SCK1 [1] P4[21]/A21/ 115 M15 SCL2/SSEL1 ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P4[29]/BLS3/ 176 B10 MAT2[1]/RXD3 [1] P4[30]/CS0 187 B7 [1] P4[31]/CS1 193 A4 [8] ALARM 37 N1 USB_D [1] DBGEN 9 F4 [1] TDO 2 D3 [1] ...

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NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball V 15, 60, G3, P6, DD(3V3) 71, 89, P8, U13, 112, P17, 125, K16, 146, C17, 165, B13, C9, 181, D7 [11] 198 n.c. 30, 117, J4, L14, [12] 141 ...

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NXP Semiconductors memory, and the AMBA APB for connection to other on-chip peripheral functions. The microcontroller permanently configures the ARM7TDMI-S processor for little-endian byte order. The LPC2468 implements two AHB in order to allow the Ethernet block to operate without ...

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NXP Semiconductors 7.2 On-chip flash programming memory The LPC2468 incorporates 512 kB flash memory system. This memory may be used for both code and data storage. Programming of the flash memory may be accomplished in several ways. It may be ...

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NXP Semiconductors Table 5. Address range General use 0x8000 0000 to 0xDFFF FFFF 0xE000 0000 to 0xEFFF FFFF 0xF000 0000 to 0xFFFF FFFF LPC2468_4 Product data sheet LPC2468 memory usage and details Address range details and description off-chip Memory four ...

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NXP Semiconductors 4.0 GB 3.75 GB 3.5 GB 2.0 GB 1.0 GB 0.0 GB Fig 4. 7.5 Interrupt controller The ARM processor core has two interrupt inputs called Interrupt Request (IRQ) and Fast Interrupt Request (FIQ). The VIC takes 32 ...

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NXP Semiconductors service routine can simply start dealing with that device. But if more than one request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC that identifies which FIQ source(s) is ...

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NXP Semiconductors – Asynchronous page mode read – Programmable Wait States – Bus turnaround delay – Output enable and write enable delays – Extended wait • Four chip selects for synchronous memory and four chip selects for static memory devices. ...

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NXP Semiconductors • One AHB master for transferring data. This interface transfers data when a DMA request goes active. • 32-bit AHB master bus width. • Incrementing or non-incrementing addressing for source and destination. • Programmable DMA burst size. The ...

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NXP Semiconductors 7.10 Ethernet The Ethernet block contains a full featured 10 Mbit/s or 100 Mbit/s Ethernet MAC designed to provide optimized performance through the use of DMA hardware acceleration. Features include a generous suite of control registers, half or ...

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NXP Semiconductors – Wake-on-LAN power management support allows system wake-up: using the receive filters or a magic frame detection filter. • Physical interface: – Attachment of external PHY chip through standard MII or RMII interface. – PHY register access is ...

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NXP Semiconductors 7.11.2.1 Features • OHCI compliant. • Two downstream ports. • Supports per-port power switching. 7.11.3 USB OTG controller USB OTG is a supplement to the USB 2.0 specification that augments the capability of existing mobile devices and USB ...

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NXP Semiconductors • Acceptance Filter can provide FullCAN-style automatic reception for selected Standard Identifiers. • Full CAN messages can generate interrupts. 7.13 10-bit ADC The LPC2468 contains one ADC single 10-bit successive approximation ADC with eight channels. ...

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NXP Semiconductors • Fractional divider for baud rate control, auto baud capabilities and FIFO control mechanism that enables software flow control implementation. • UART1 equipped with standard modem interface signals. This module also provides full support for hardware flow control ...

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NXP Semiconductors 7.18.1 Features • The MCI provides all functions specific to the SD/MMC memory card. These include the clock generation unit, power management control, and command and data transfer. • Conforms to Multimedia Card Specification v2.11 . • Conforms ...

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NXP Semiconductors 2 The I S-bus specification defines a 3-wire serial bus using one data line, one clock line, and one word select signal. The basic I master, and one slave. The I and receive channel, each of which can ...

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NXP Semiconductors 7.22 Pulse width modulator The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2468. The Timer is designed to count cycles of ...

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NXP Semiconductors • Pulse period and width can be any number of timer counts. This allows complete flexibility in the trade-off between resolution and repetition rate. All PWM outputs will occur at the same repetition rate. • Double edge controlled ...

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NXP Semiconductors 7.24.1 Features • Measures the passage of time to maintain a calendar and clock. • Ultra low power design to support battery powered systems. • Provides Seconds, Minutes, Hours, Day of Month, Month, Year, Day of Week, and ...

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NXP Semiconductors 7.25.1.3 RTC oscillator The RTC oscillator can be used as the clock source for the RTC and/or the WDT. Also, the RTC oscillator can be used to drive the PLL and the CPU. 7.25.2 PLL The PLL accepts ...

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NXP Semiconductors values, and/or altering the CPU clock divider value. This allows a trade-off of power versus processing speed based on application requirements. In addition, Peripheral power control allows shutting down the clocks to individual on-chip peripherals, allowing fine tuning ...

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NXP Semiconductors 7.25.4.4 Power domains The LPC2468 provides two independent power domains that allow the bulk of the device to have power removed while maintaining operation of the RTC and the Battery RAM. On the LPC2468, I/O pads are powered ...

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NXP Semiconductors The second stage of low-voltage detection asserts Reset to inactivate the LPC2468 when the voltage on the V flash as operation of the various elements of the chip would otherwise become unreliable due to low voltage. The BOD ...

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NXP Semiconductors 7.26.5 External interrupt inputs The LPC2468 includes edge sensitive interrupt inputs combined with up to four level sensitive external interrupt inputs as selectable pin functions. The external interrupt inputs can optionally be used to wake ...

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NXP Semiconductors addresses as well as a set of status signals that indicate the pipeline status on a cycle by cycle basis. Trace information generation can be controlled by selecting the trigger resource. Trigger resources include address comparators, counters and ...

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NXP Semiconductors 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter supply voltage DD(DCDC)(3V3) (3 analog 3.3 V pad ...

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NXP Semiconductors 9. Static characteristics Table 7. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter DD(DCDC)(3V3) supply voltage (3 ...

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NXP Semiconductors Table 7. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter I active mode DC-to-DC DD(DCDC)act(3V3) converter supply current (3 power-down mode DD(DCDC)pd(3V3) DC-to-DC converter supply current ...

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NXP Semiconductors Table 7. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter USB pins I OFF-state output OZ current V bus supply voltage BUS V differential input DI sensitivity voltage ...

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NXP Semiconductors Table 8. ADC static characteristics +85 C unless otherwise specified; ADC frequency 4.5 MHz. DDA amb Symbol Parameter V analog input voltage IA C analog input ...

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NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity ...

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NXP Semiconductors AD0[y] Fig 6. Suggested ADC interface - LPC2468 AD0[y] pin LPC2468_4 Product data sheet LPC2XXX 20 k SAMPLE SSIO, SSCORE Rev. 04 — 17 October 2008 LPC2468 Fast communication chip R vsi ...

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NXP Semiconductors 10. Dynamic characteristics Table 9. Dynamic characteristics of USB pins (full-speed pF 1 Symbol Parameter t rise time r t fall time f t differential rise ...

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Table 11. Dynamic characteristics: Static external memory interface pF amb DD(DCDC)(3V3) Symbol Parameter Conditions [1] Common to read and write cycles t CS LOW to address valid CSLAV ...

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Table 11. Dynamic characteristics: Static external memory interface pF amb DD(DCDC)(3V3) Symbol Parameter Conditions t WE HIGH to data invalid WEHDNV time t BLS HIGH to address BLSHANV ...

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NXP Semiconductors Table 12. Dynamic characteristics: Dynamic external memory interface pF amb Symbol Parameter Common t chip select valid delay time d(SV) t chip select hold time h(S) ...

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NXP Semiconductors 10.1 Timing Fig 7. External clock timing (with an amplitude of at least V CS addr data t CSLOEL OE BLS Fig 8. External memory read access LPC2468_4 Product data sheet t t CHCL CLCX T cy(clk) = ...

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NXP Semiconductors CS BLS/WE addr data OE Fig 9. External memory write access t PERIOD differential data lines Fig 10. Differential data-to-EOP transition skew and EOP width LPC2468_4 Product data sheet t AVCSL t WELWEH t CSLWEL t BLSLBLSH t ...

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NXP Semiconductors shifting edges SCK MOSI MISO Fig 11. MISO line set-up time in SSP Master mode Fig 12. Signal timing LPC2468_4 Product data sheet t su(SPI_MISO) reference clock t d(XXX) output signal (O) input signal (I) Rev. 04 — ...

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NXP Semiconductors 11. Application information 11.1 Suggested USB interface solutions LPC24XX Fig 13. LPC2468 USB interface on a self-powered device LPC24XX Fig 14. LPC2468 USB interface on a bus-powered device LPC2468_4 Product data sheet V DD(3V3) USB_UP_LED USB_CONNECT soft-connect switch ...

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NXP Semiconductors RSTOUT USB_SCL1 USB_SDA1 USB_INT1 USB_D+1 USB_D 1 USB_UP_LED1 LPC24XX USB_PPWR2 USB_OVRCR2 USB_PWRD2 USB_D+2 USB_D 2 USB_UP_LED2 Fig 15. LPC2468 USB OTG port configuration: USB port 1 OTG dual-role device, USB port 2 host LPC2468_4 Product data sheet V ...

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NXP Semiconductors RSTOUT USB_TX_E1 USB_TX_DP1 USB_TX_DM1 USB_RCV1 USB_RX_DP1 USB_RX_DM1 LPC24XX USB_SCL1 USB_SDA1 USB_INT1 USB_UP_LED1 Fig 16. LPC2468 USB OTG port configuration: VP_VM mode LPC2468_4 Product data sheet V DD RESET_N OE_N/INT_N DAT_VP SE0_VM RCV ISP1301 ADR/PSW ...

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NXP Semiconductors USB_UP_LED1 USB_D+1 USB_D 1 USB_PWRD1 USB_OVRCR1 USB_PPWR1 LPC24XX USB_UP_LED2 USB_CONNECT2 USB_D+2 USB_D 2 V BUS Fig 17. LPC2468 USB OTG port configuration: USB port 2 device, USB port 1 host LPC2468_4 Product data sheet ...

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NXP Semiconductors USB_UP_LED1 USB_D+1 USB_D 1 USB_PWRD1 USB_OVRCR1 USB_PPWR1 LPC24XX USB_PPWR2 USB_OVRCR2 USB_PWRD2 USB_D+2 USB_D 2 USB_UP_LED2 Fig 18. LPC2468 USB OTG port configuration: USB port 1 host, USB port 2 host LPC2468_4 Product data sheet ...

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NXP Semiconductors 12. Package outline LQFP208; plastic low profile quad flat package; 208 leads; body 1 156 157 pin 1 index 208 DIMENSIONS (mm are the original ...

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NXP Semiconductors TFBGA208: plastic thin fine-pitch ball grid array package; 208 balls; body 0.7 mm ball A1 index area ...

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NXP Semiconductors 13. Abbreviations Table 13. Acronym ADC AHB AMBA APB BLS BOD CAN DAC DCC DMA EOP ETM GPIO IrDA JTAG MII OHC OHCI OTG PHY PLL PWM RMII SD/MMC SE0 SPI SSI SSP TTL UART USB LPC2468_4 Product ...

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NXP Semiconductors 14. Revision history Table 14. Revision history Document ID Release date LPC2468_4 20081017 • Modifications: Added • Added access”. • Table • Table LPC2468_3 20080618 LPC2468_2 20071017 LPC2468_1 20070904 LPC2468_4 Product data sheet Data sheet status Product data ...

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NXP Semiconductors 15. Legal information 15.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

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NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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NXP Semiconductors 15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 70 15.2 Definitions . . . . . . . . . ...

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