AM79C972BKCW Advanced Micro Devices, AM79C972BKCW Datasheet - Page 33

• Manufacturer Part Number: AM79C972BKCW
• Description: PCnet-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
• Manufacturer: Advanced Micro Devices

Master Bus Interface Unit
The master Bus Interface Unit (BIU) controls the acqui-
sition of the PCI bus and all accesses to the initializa-
tion block, descriptor rings, and the receive and
transmit buffer memory. Table 3 shows the usage of
PCI commands by the Am79C972 controller in master
mode.
C[3:0]
0000
0001
0010
0011
0100
0101
0110
Command
Interrupt
Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Table 3. Master Commands
DEVSEL
FRAME
PERR
TRDY
C/BE
IRDY
CLK
PAR
AD
1
Figure 10. Slave Cycle Data Parity Error Response
Use
Not used
Not used
Not used
Not used
Read of the initialization
block and descriptor
rings
Read of the transmit
buffer in non-burst mode
2
ADDR
CMD
3
PAR
4
Am79C972
5
DATA
BE
Bus Acquisition
The Am79C972 microcode will determine when a DMA
transfer should be initiated. The first step in any
Am79C972 bus master transfer is to acquire ownership
of the bus. This task is handled by synchronous logic
within the BIU. Bus ownership is requested with the
REQ signal and ownership is granted by the arbiter
through the GNT signal.
C[3:0]
1001
1010
1011
1100
1101
1110
1111
0111
1000
6
Table 3. Master Commands (Continued)
PAR
Memory Write
Reserved
Command
Reserved
Configuration Read Not used
Configuration Write Not used
Memory Read
Multiple
Dual Address Cycle Not used
Memory Read Line
Memory Write
Invalidate
7
8
9
Write to the descriptor
rings and to the re-
ceive buffer
Use
Read of the transmit
buffer in burst mode
Read of the transmit
buffer in burst mode
Not used
10
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