AM79C972BKCW Advanced Micro Devices, AM79C972BKCW Datasheet - Page 70

• Manufacturer Part Number: AM79C972BKCW
• Description: PCnet-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
• Manufacturer: Advanced Micro Devices

Automatic Network Selection: Exceptions
If ASEL (BCR2, bit 0) is set to 0 or DANAS (BCR 32, bit
7) is set to 1, then the Network Port Manager will dis-
continue actively trying to establish the connections. It
is assumed that the software driver is attempting to
configure the network port and the Am79C972 control-
ler will always defer to the software driver. When The
ASEL is set to 0, the software driver should then con-
figure the ports with PORTSEL (CSR15, bits 7-8). The
GPSI does not participate in the automatic selection
process and should be manually configured with the
PORTSEL bits.
Note:
PORTSEL be used when trying to manually configure
a specific network port.
In order to manually configure the External PHY, the
recommended procedure is to force the PHY config-
urations when Auto-Negotiation is not enabled. Set the
DANAS bit (BCR32, bit 7) to turn off the Network Port
Manager. Then write again to BCR32 with the DANAS
and XPHANE (BCR32, bit 5) bits cleared, together with
the XPHYFD (BCR32, bit 4) and XPHYSP (BCR32,
bit 3) bits set to the desired configuration. The Network
Port Manager will send a few frames to validate the
configuration.
CAUTION: The Network Port Manager utilizes the
PHYADD (BCR33, bits 9-5) to communicate with the
external PHY during the automatic port selection pro-
cess. The PHYADD is copied into a shadow register
after the Am79C972 controller has read the configura-
tion information from the EEPROM. Extreme care must
be exercised by the host software not to access BCR33
during this time. A read of PVALID (BCR19, bit 15) be-
fore accessing BCR33 will guarantee that the PHYADD
has been shadowed.
Am79C972’s Automatic Network Port selection mecha-
nism falls within the following general categories:
n External PHY Not Auto-Negotiable
n External PHY Auto-Negotiable
Automatic Network Selection: External PHY Not
Auto-Negotiable
This case occurs when the MIIPD (BCR32, bit 14) bit is
1. This indicates that there is an external PHY attached
to Am79C972 controller’s MII. If more than one external
PHY is attached to the MII Management Interface, then
the DANAS (BCR32, bit 7) bit must be set to 1 and then
all configuration control should revert to software. The
Am79C972 controller will read the register of the exter-
nal PHY to determine its status and network capabili-
ties. See Appendix C, MII Management Registers, for
the bit descriptions of the MII Status register. If the ex-
ternal PHY is not Auto-Negotiation capable and/or the
XPHYANE (BCR32, bit 5) bit is set to 0, then the Net-
work Port Manager will match up the external PHY ca-
70
It is highly recommended that ASEL and
Am79C972
pabilities with the XPHYFD (BCR 32, bit 4) and the
XPHYSP (BCR32, bit 3) bits programmed from the EE-
PROM. The Am79C972 controller will then program the
external PHY with those values. A new read of the ex-
ternal PHYs MII Status register will be made to see if
the link is up. If the link does not come up as pro-
grammed after a specific time, the Am79C972 control-
ler will fail the external PHY link. The Network Port
Manager will periodically query the external PHY for
active links.
Automatic Network Selection: External PHY
Auto-Negotiable
This case occurs when the MIIPD (BCR32, bit 14) bit is
1. This indicates that there is an external PHY attached
to Am79C972 controller’s MII. If more than one external
PHY is attached to the MII Management Interface, then
the DANAS (BCR32, bit 7) bit must be set to 1 and then
all configuration control should revert to software. The
Am79C972 controller will read the MII Status register of
the external PHY to determine its status and network
capabilities. See Appendix C for the bit descriptions of
the MII Status register. If the external PHY is Auto-Ne-
gotiation capable and/or the XPHYANE (BCR32, bit 5)
bit is set to 1, then the Am79C972 controller will start
the external PHY’s Auto-Negotiation process. The
Am79C972 controller will write to the external PHY’s
Advertisement register with the following conditions
set: turn off the Next Pages support, set the Technology
Ability Field (See Appendix C for the Auto-Negotiation
register bit descriptions) from the external PHY MII Sta-
tus register read, and set the Type Selector field to the
IEEE 802.3 standard. The Am79C972 controller will
then write to the external PHY’s MII Control register in-
structing the external PHY to negotiate the link. The
Am79C972 controller will poll the external PHY’s MII
Status register until the Auto-Negotiation Complete bit
is set to 1and the Link Status bit is set to 1. The
Am79C972 controller will then wait a specific time and
then again read the external PHY’s MII Status register.
If the Am79C972 controller sees that the external
PHY’s link is down, it will try to bring up the external
PHY’s link manually as described above. A new read of
the external PHY’s MII Status register will be made to
see if the link is up. If the link does not come up as pro-
grammed after a specific time, the Am79C972 control-
ler will fail the external PHY link and start the process
again.
Automatic Network Selection: Force External Reset
If the XPHYRST bit (BCR32, bit 6) is set to 1, then the
flow changes slightly. The Am79C972 controller will
write to the external PHY’s MII Control register with the
RESET bit set to 1 (See Appendix C, MII Management
Registers, for the MII register bit descriptions). This will
force a complete reset of the external PHY. The
Am79C972 controller after a specific time will poll the
external PHY’s MII Control register to see if the RESET