AM79C973KCW Advanced Micro Devices, AM79C973KCW Datasheet - Page 209

• Manufacturer Part Number: AM79C973KCW
• Description: PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
• Manufacturer: Advanced Micro Devices

Transmit Descriptors
When SWSTYLE (BCR20, bits 7-0) is set to 0, the soft-
ware structures are defined to be 16 bits wide, and trans-
mit descriptors look like Table 61 (CXDA = Current
Transmit Descriptor Address).
When SWSTYLE (BCR 20, bits 7-0) is set to 2, the
software structures are defined to be 32 bits wide, and
TMD0
Bit
31-0
TMD1
Bit
31
CXDA+0Ch
CXDA+0Ch
CXDA+00h
CXDA+04h
CXDA+08h BUFF UFLO
CXDA+00h BUFF UFLO
CXDA+04h
CXDA+08h
Address
Address
CXDA+00h
CXDA+02h
CXDA+04h
CXDA+06h
Address
TBADR
OWN
Name
Name
OWN
OWN
31
31
BUFF
OWN
15
1
Transmit Buffer address. This
field contains the address of the
transmit buffer that is associated
with this descriptor.
This bit indicates whether the de-
scriptor entry is owned by the
host (OWN = 0) or by the
Am79C973/Am79C975 controller
(OWN = 1). The host sets the
ERR
ERR
Description
Description
30
30
UFLO
ADD_
ADD_
ERR
FCS
DEF
DEF
FCS
14
EX
EX
29
29
1
Table 61. Transmit Descriptor (SWSTYLE = 0)
Table 62. Transmit Descriptor (SWSTYLE = 2)
Table 63. Transmit Descriptor (SWSTYLE = 3)
MORE/
MORE/
LTINT
LTINT
LCOL
LCOL
ADD_
28
28
FCS
DEF
EX
13
1
P R E L I M I N A R Y
LCAR
LCAR
Am79C973/Am79C975
ONE
ONE
27
27
MORE/
LTINT
LCOL
12
1
RTRY
RTRY
DEF
DEF
26
26
LCAR
USER SPACE
USER SPACE
ONE
TBADR[31:0]
TBADR[31:0]
11
TBADR[15:0]
transmit descriptors look like Table 62 (CXDA = Current
Transmit Descriptor Address).
When SWSTYLE (BCR 20, bits 7-0) is set to 3, then the
software structures are defined to be 32 bits wide, and
transmit descriptors look like Table 63 (CXDA = Current
Transmit Descriptor Address).
30
RES
STP
STP
25
25
RTRY
DEF
ERR
10
ENP
RES
ENP
24
24
BPE
RES
BPE
RES
23
23
STP
9
OWN bit after filling the buffer
pointed to by the descriptor entry.
The Am79C973/Am79C975 con-
troller clears the OWN bit after
transmitting the contents of the
buffer. Both the Am79C973/
Am79C975 controller and the
host must not alter a descriptor
entry after it has relinquished
ownership.
ERR is the OR of UFLO, LCOL,
LCAR, RTRY or BPE. ERR is set
by the Am79C973/Am79C975
controller and cleared by the
host. This bit is set in the current
descriptor when the error occurs
BCNT
22-16
22-16
RES
RES
RES
ENP
8
15-12
15-12
1111
1111
RES
TDR
TBADR[23:16]
11-4
RES
11-4
RES
7-0
BCNT
BCNT
TRC
TRC
3-0
3-0
209