AM79C973KCW Advanced Micro Devices, AM79C973KCW Datasheet - Page 46

• Manufacturer Part Number: AM79C973KCW
• Description: PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
• Manufacturer: Advanced Micro Devices

Master Bus Interface Unit
The master Bus Interface Unit (BIU) controls the acqui-
sition of the PCI bus and all accesses to the initializa-
tion block, descriptor rings, and the receive and
transmit buffer memory. Table 4 shows the usage of
PCI commands by the Am79C973/Am79C975 control-
ler in master mode.
46
C[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
Command
Interrupt
Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Table 4. Master Commands
DEVSEL
FRAME
PERR
TRDY
C/BE
IRDY
CLK
PAR
AD
1
Figure 10. Slave Cycle Data Parity Error Response
Use
Not used
Not used
Not used
Not used
Read of the initialization
block and descriptor
rings
Read of the transmit
buffer in non-burst mode
Write to the descriptor
rings and to the receive
buffer
2
ADDR
CMD
3
P R E L I M I N A R Y
Am79C973/Am79C975
PAR
4
5
DATA
BE
Bus Acquisition
The Am79C973/Am79C975 microcode will determine
when a DMA transfer should be initiated. The first step
in any Am79C973/Am79C975 bus master transfer is to
acquire ownership of the bus. This task is handled by
synchronous logic within the BIU. Bus ownership is re-
quested with the REQ signal and ownership is granted
by the arbiter through the GNT signal.
Figure 11 shows the Am79C973/Am79C975 controller
bus acquisition. REQ is asserted and the arbiter re-
turns GNT while another bus master is transferring
data. The Am79C973/Am79C975 controller waits until
the bus is idle (FRAME and IRDY deasserted) before it
C[3:0]
1001
1010
1011
1100
1101
1110
1111
6
PAR
Table 4. Master Commands (Continued)
7
Command
Reserved
Configuration Read Not used
Configuration Write Not used
Memory Read
Multiple
Dual Address Cycle Not used
Memory Read Line
Memory Write
Invalidate
8
9
Use
Read of the transmit
buffer in burst mode
Read of the transmit
buffer in burst mode
Not used
10
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