K4R881869 Samsung semiconductor, K4R881869 Datasheet - Page 17

• Manufacturer Part Number: K4R881869
• Description: 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
• Manufacturer: Samsung semiconductor

K4R881869M
COL-to-ROW Packet Interaction
Figure 9 shows arbitrary packets on the COL and ROW pins.
They must be separated by an interval t
depends upon the command and address values in the
packets. Table 13 summarizes the t
possible cases.
Cases CR1, CR2, CR3, and CR9 show no interaction
between the COL and ROW packets, either because one of
the commands is a NOP or because the packets are directed
to different devices or to non-adjacent banks.
a. This is any command which permits the write buffer of device Da to retire (see Table 8).
b. This situation is hazardous because the write buffer will be left unretired while the targeted bank is precharged. See Figure 19.
Case #
CR1
CR2
CR3
CR4
CR5
CR6
CR7
CR8
CR9
COL4
CTM/CFM
DQA8..0
DQB8..0
ROW2
Figure 9: COL-to-ROW Packet Interaction- Timing
..COL0
..ROW0
COPa
NOCOP
RD/WR
RD/WR
RD/WR
RD/WR
RD
retire
WR
xxxx
b
a
T
0
COPa a1
Transaction b: ROPb
Transaction a: COPa
T
1
Da
Da
Da
Da
Da
Da
Da
Da
Da
Da
T
2
T
3
T
Ba
Ba
Ba
Ba
Ba
Ba
Ba
Ba
Ba
Ba
4
T
5
T
6
Ca1
Ca1
Ca1
Ca1
Ca1
Ca1
Ca1
Ca1
Ca1
Ca1
T
7
T
8
T
CRDELAY
Table 13: COL-to-ROW Packet Interaction - Rules
9
ROPb b0
ROPb
x..x
x..x
x..x
ACT
ACT
PRER
PRER
PRER
NOROP
T
10
a1= {Da,Ba,Ca1}
b0= {Db,Bb,Rb}
CRDELAY
T
11
T
12
T
13
value for all
T
t
Db
xxxxx
/= Da
== Da
== Da
== Da
== Da
== Da
== Da
xxxxx
14
CRDELAY
T
15
which
T
16
T
17
T
Bb
xxxx
xxxx
/= {Ba,Ba+1,Ba-1}
== {Ba}
== {Ba+1,Ba-1}
== {Ba,Ba+1,Ba-1} x..x
== {Ba,Ba+1,Ba-1} x..x
== {Ba,Ba+1,Ba-1} x..x
xxxx
18
T
19
Page 15
T
Case CR4 is illegal because an already-activated bank is to
be re-activated without being precharged Case CR5 is illegal
because an adjacent bank can’t be activated or precharged
until bank Ba is precharged first.
In case CR6, the COLC packet contains a RD command, and
the ROW packet contains a PRER command for the same
bank. The t
Likewise, in case CR7, the COLC packet causes an auto-
matic retire to take place, and the ROW packet contains a
PRER command for the same bank. The t
specifies the required spacing.
Case CR8 is labeled “Hazardous” because a WR command
should always be followed by an automatic retire before a
precharge is scheduled. Figure 19 shows an example of what
can happen when the retire is not able to happen before the
precharge.
For the purposes of analyzing COL-to-ROW interactions,
the PREC, WRA, and RDA commands of the COLC packet
are equivalent to the NOCOP, WR, and RD commands.
These commands also cause a precharge operation to take
place. This precharge may converted to an equivalent PRER
command on the ROW pins using the rules summarized in
Figure 14.
A ROW packet may contain commands other than ACT or
PRER. The REFA and REFP commands are equivalent to
ACT and PRER for interaction analysis purposes. The inter-
action rules of the NAPR, PDNR, and RLXR commands are
discussed in a later section.
“
Rb
x..x
x..x
x..x
x..x
x..x
x..x
Ba
”
RDP
is the bank address in the write buffer.
t
0
0
0
Illegal
Illegal
t
t
0
0
RDP
RTP
parameter specifies the required spacing.
CRDELAY
Preliminary
Direct RDRAM
Rev. 0.9 Jan. 2000
RTP
parameter
Example
Figure 15
Figure 16
Figure 19
™