CY7C128A20VXC Cypress Semiconductor Corporation., CY7C128A20VXC Datasheet

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CY7C128A20VXC

Manufacturer Part Number
CY7C128A20VXC
Description
SOJ
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Specifications of CY7C128A20VXC

Date_code
08+
Cypress Semiconductor Corporation
Document #: 38-05028 Rev. *A
Features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• High speed
• Low active power
• Low standby power
• TTL-compatible inputs and outputs
• Capable of withstanding greater than 2001V electro-
• Available in Pb-free and non Pb-free 24-pin Molded
— 15 ns
— 660 mW (commercial)
— 110 mW (20 ns)
static discharge
SOJ, non Pb-free 24-pin (300-Mil) Molded DIP
CE
WE
Logic Block Diagram
OE
A
A
A
A
A
A
A
10
9
8
7
6
5
4
A
3
INPUT BUFFER
128 x 16 x 8
DECODER
ARRAY
COLUMN
A
2
A
1
A
0
POWER
DOWN
198 Champion Court
Functional Description
The CY7C128A is a high-performance CMOS static RAM
organized as 2048 words by 8 bits. Easy memory expansion
is provided by an active LOW Chip Enable (CE), and active
LOW Output Enable (OE) and tri-state drivers. The CY7C128A
has an automatic power-down feature, reducing the power
consumption by 83% when deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW.
Data on the eight I/O pins (I/O
memory location specified on the address pins (A
A
Reading the device is accomplished by taking Chip Enable
(CE) and Output Enable (OE) LOW while Write Enable (WE)
remains HIGH. Under these conditions, the contents of the
memory location specified on the address pins will appear on
the eight I/O pins.
The I/O pins remain in high-impedance state when Chip
Enable (CE) or Output Enable (OE) is HIGH or Write Enable
(WE) is LOW.
The CY7C128A utilizes a die coat to insure alpha immunity.
10
).
C128A–1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
San Jose
,
Pin Configurations
GND
I/O
I/O
I/O
CA 95134-1709
A
A
A
A
A
A
A
A
7
6
5
4
3
2
1
0
0
1
2
2K x 8 Static RAM
1
2
3
4
5
6
7
8
9
10
11
12
DIP/SOJ
Top View
0
7C128A
through I/O
Revised August 3, 2006
24
23
22
21
20
19
18
17
16
15
14
13
WE
V
A
A
OE
A
CE
I/O
I/O
I/O
I/O
I/O
7
CC
8
9
10
) is written into the
CY7C128A
7
6
5
4
3
408-943-2600
C128A–2
0
through
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