EPM7064STC447N

Manufacturer Part NumberEPM7064STC447N
DescriptionQFP-44
ManufacturerAltera Corporation
EPM7064STC447N datasheet
 


Specifications of EPM7064STC447N

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September 2005, ver. 6.7
Features...
f
For information on in-system programmable 3.3-V MAX 7000A or 2.5-V
MAX 7000B devices, see the
Data Sheet
Sheet.
Table 1. MAX 7000 Device Features
Feature
EPM7032
EPM7064
Usable
600
1,250
gates
Macrocells
32
Logic array
2
blocks
Maximum
36
user I/O pins
t
(ns)
6
PD
t
(ns)
5
SU
t
(ns)
2.5
FSU
t
(ns)
4
CO1
f
(MHz)
151.5
151.5
CNT
Altera Corporation
DS-MAX7000-6.7
®
High-performance, EEPROM-based programmable logic devices
(PLDs) based on second-generation MAX
5.0-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in
MAX 7000S devices
ISP circuitry compatible with IEEE Std. 1532
Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S
devices
Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S
devices with 128 or more macrocells
Complete EPLD family with logic densities ranging from 600 to
5,000 usable gates (see
Tables 1
5-ns pin-to-pin logic delays with up to 175.4-MHz counter
frequencies (including interconnect)
PCI-compliant devices available
MAX 7000A Programmable Logic Device Family
or the
MAX 7000B Programmable Logic Device Family Data
EPM7096
EPM7128E
1,800
2,500
64
96
128
4
6
8
68
76
100
6
7.5
7.5
5
6
6
2.5
3
3
4
4.5
4.5
125.0
125.0
MAX 7000
Programmable Logic
Device Family
Data Sheet
®
architecture
and 2)
EPM7160E
EPM7192E
EPM7256E
3,200
3,750
5,000
160
192
256
10
12
104
124
164
10
12
7
7
3
3
5
6
100.0
90.9
90.9
16
12
7
3
6
1