74LVC373AD,118 NXP Semiconductors, 74LVC373AD,118 Datasheet - Page 18

• Manufacturer Part Number: 74LVC373AD,118
• Description: IC OCTAL D TRANSP LATCH 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74LVCr

Specifications of 74LVC373AD,118

• Logic Type: D-Type Transparent Latch
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 2.7 V ~ 3.6 V
• Independent Circuits: 1
• Delay Time - Propagation: 1.5ns
• Current - Output High, Low: 24mA, 24mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74LVC373AD-T; 74LVC373AD-T; 935218630118

Philips Semiconductors
Suitability of surface mount IC packages for wave and reflow soldering methods
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note ” (AN01026); order a copy
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
2003 May 19
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, HVSON, SMS
PLCC
LQFP, QFP, TQFP
SSOP, TSSOP, VSO, VSSOP
Octal D-type transparent latch with
5 V tolerant inputs/outputs; 3-state
from your Philips Semiconductors sales office.
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods” .
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
The package footprint must incorporate solder thieves downstream and at the side corners.
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
(4)
, SO, SOJ
PACKAGE
(1)
18
not suitable
not suitable
suitable
not recommended
not recommended
WAVE
(3)
SOLDERING METHOD
(4)(5)
(6)
suitable
suitable
suitable
suitable
suitable
Product specification
74LVC373A
REFLOW
(2)