HCF4099BEY STMicroelectronics, HCF4099BEY Datasheet

IC LATCH 8BIT ADDRESSABLE 16-DIP

HCF4099BEY

Manufacturer Part Number
HCF4099BEY
Description
IC LATCH 8BIT ADDRESSABLE 16-DIP
Manufacturer
STMicroelectronics
Series
4000Br
Datasheet

Specifications of HCF4099BEY

Logic Type
D-Type, Addressable
Circuit
1:8
Output Type
Standard
Voltage - Supply
3 V ~ 20 V
Independent Circuits
1
Delay Time - Propagation
50ns
Current - Output High, Low
6.8mA, 6.8mA
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Number Of Circuits
8
Logic Family
HCF40
Polarity
Non-Inverting
Input Bias Current (max)
0.08 uA
High Level Output Current
- 2.4 mA
Low Level Output Current
32 mA
Propagation Delay Time
400 ns at 5 V, 150 ns at 10 V, 100 ns at 15 V
Supply Voltage (max)
20 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1374-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HCF4099BEY
Manufacturer:
STM
Quantity:
3 185
DESCRIPTION
HCF4099B is a monolithic integrated circuit
fabricated
technology available in DIP and SOP packages.
HCF4099B, an 8-bit addressable latch, is a
serial-input, parallel output storage register that
can perform a variety of functions. Data is input to
a particular bit in the latch when that bit is
addressed (by means of input A0, A1, A2) and
when WRITE DISABLE is at a low level. When
PIN CONNECTION
October 2002
SERIAL DATA INPUT - ACTIVE PARALLEL
OUTPUT
STORAGE REGISTER CAPABILITY -
MASTER CLEAR
CAN FUNCTION AS DEMULTIPLEXER
QUIESCENT CURRENT SPECIFIED UP TO
20V
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
INPUT LEAKAGE CURRENT
I
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
I
= 100nA (MAX) AT V
in
Metal
Oxide
DD
= 18V T
Semiconductor
A
= 25°C
8 BIT ADDRESSABLE LATCH
ORDER CODES
WRITE DISABLE is high, data entry is inhibited;
however, all 8 outputs can be continuously read
independent of WRITE DISABLE and address
inputs. A master RESET input is available, which
resets all bits to a logic "0" level when RESET and
WRITE DISABLE are at a high level. When
RESET is at a high level, and WRITE DISABLE is
at a low level, the latch acts as a 1-of-8
demultiplexer ; the bit that is addressed has an
active output which follows the data input, while all
unaddressed bits are held to a logic "0" level.
PACKAGE
SOP
DIP
DIP
HCF4099BM1
HCF4099BEY
TUBE
HCF4099B
HCF4099M013TR
SOP
T & R
1/14

Related parts for HCF4099BEY

HCF4099BEY Summary of contents

Page 1

... RESET high level, and WRITE DISABLE low level, the latch acts as a 1-of-8 demultiplexer ; the bit that is addressed has an active output which follows the data input, while all unaddressed bits are held to a logic "0" level. HCF4099B DIP SOP TUBE T & R HCF4099BEY HCF4099BM1 HCF4099M013TR 1/14 ...

Page 2

HCF4099B IINPUT EQUIVALENT CIRCUIT FUNCTIONAL DIAGRAM TRUTH TABLE INPUTS WRITE DISABLE RESET The level at the data input ; Q The level ...

Page 3

LOGIC DIAGRAM TIMING CHART HCF4099B 3/14 ...

Page 4

HCF4099B ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage Input Voltage Input Current I P Power Dissipation per Package D Power Dissipation per Output Transistor T Operating Temperature op T Storage Temperature stg Absolute Maximum ...

Page 5

DC SPECIFICATIONS Symbol Parameter V (V) I Quiescent Current 0/5 L 0/10 0/15 0/20 V High Level Output 0/5 OH Voltage 0/10 0/15 V Low Level Output 5/0 OL Voltage 10/0 15/0 V High Level Input IH Voltage V Low ...

Page 6

HCF4099B DYNAMIC ELECTRICAL CHARACTERISTICS (T Symbol Parameter t t Propagation Delay Time PLH PHL (Data to Output Propagation Delay Time PLH PHL (Write Disable to Output Propagation Delay Time PLH PHL (Address to Output) t Propagation ...

Page 7

TEST CIRCUIT C = 50pF or equivalent (includes jig and probe capacitance 200K pulse generator (typically OUT WAVEFORM 1 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) HCF4099B 7/14 ...

Page 8

HCF4099B WAVEFORM 2 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) WAVEFORM 3 : MINIMUM PULSE WIDTH, SETUP AND HOLD TIME (f=1MHz; 50% duty cycle) 8/14 ...

Page 9

WAVEFORM 4 : MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle) WAVEFORM 5 : SETUP AND HOLD TIME (f=1MHz; 50% duty cycle) HCF4099B 9/14 ...

Page 10

HCF4099B WAVEFORM 6 : INPUT WAVEFORMS (f=1MHz; 50% duty cycle) TIPICAL APPLICATIONS 10/14 ...

Page 11

TIPICAL APPLICATIONS HCF4099B 11/14 ...

Page 12

HCF4099B DIM. MIN. a1 0. 12/14 Plastic DIP-16 (0.25) MECHANICAL DATA mm. TYP MAX. 1.65 0.5 0.25 20 8.5 2.54 17.78 7.1 5.1 3.3 1.27 inch MIN. TYP. ...

Page 13

SO-16 MECHANICAL DATA DIM. MIN 0 0. 9 3.8 G 4 mm. TYP MAX. MIN. 1.75 0.2 0.003 1.65 0.46 0.013 0.25 ...

Page 14

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied ...

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