74ALVCH162373TX Fairchild Semiconductor, 74ALVCH162373TX Datasheet

74ALVCH162373TX

Manufacturer Part Number

74ALVCH162373TX

Description

IC LATCH TRANSP 16BIT LV 48TSSOP

Manufacturer

Fairchild Semiconductor

Series

74ALVCHr

Datasheet

1.74ALVCH162373T.pdf (6 pages)

Specifications of 74ALVCH162373TX

Logic Type

D-Type Transparent Latch

Circuit

8:8

Output Type

Tri-State

Voltage - Supply

1.65 V ~ 3.6 V

Independent Circuits

Delay Time - Propagation

1ns

Current - Output High, Low

12mA, 12mA

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

48-TSSOP

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

74ALVCH162373TX

Manufacturer:

FAIRCHILD/仙童

Quantity:

20 000

Current page: 1 of 6
Download datasheet (97Kb)

74ALVCH162373T

Ordering Number Package Number

74ALVCH162373

Low Voltage 16-Bit Transparent Latch with Bushold

and 26 Series Resistors in Outputs

General Description

The ALVCH162373 contains sixteen non-inverting latches

with 3-STATE outputs and is intended for bus oriented

applications. The device is byte controlled. The flip-flops

appear to be transparent to the data when the Latch enable

(LE) is HIGH. When LE is LOW, the data that meets the

setup time is latched. Data appears on the bus when the

Output Enable (OE) is LOW. When OE is HIGH, the out-

puts are in a high impedance state.

The ALVCH162373 data inputs include active bushold cir-

cuitry, eliminating the need for external pull-up resistors to

hold unused or floating data inputs at a valid logic level.

The ALVCH162373 is also designed with 26

tors in the outputs. This design reduces line noise in appli-

cations such as memory address driver, clock drivers and

bus transceivers/transmitters.

The 74ALVCH162373 is designed for low voltage (1.65V to

3.6V) V

The 74ALVCH162373 is fabricated with an advanced

CMOS technology to achieve high speed operation while

maintaining low CMOS power dissipation.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

applications with output compatibility up to 3.6V.

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

series resis-

DS500708

Features

Pin Descriptions

1.65V to 3.6V V

3.6V tolerant control inputs and outputs

Bushold on data inputs eliminates the need for external

pull-up/pull-down resistors

26 series resistors in outputs

Uses patented noise/EMI reduction circuitry

Latchup conforms to JEDEC JED78

ESD performance:

Pin Names

3.8 ns max for 3.0V to 3.6V V

5.0 ns max for 2.3V to 2.7V V

9.0 ns max for 1.65V to 1.95V V

Human body model

Machine model

Package Description

–I

–O

to O

)

supply operation

Output Enable Input (Active LOW)

200V

2000V

Latch Enable Input

November 2001

Revised November 2001

Bushold Inputs

Description

Outputs

www.fairchildsemi.com

Related parts for 74ALVCH162373TX

74ALVCH162373TX Summary of contents

Page 1

... MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2001 Fairchild Semiconductor Corporation Features 1.65V to 3.6V V supply operation CC 3 ...

Page 2

Connection Diagram Functional Description The 74ALVCH162373 contains sixteen edge D-type latches with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. Control pins can be shorted together to obtain full 16-bit operation. ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage (V ) (Note 2) 0. Input Diode Current ( Output Diode Current (I ) ...

Page 4

AC Electrical Characteristics Symbol Parameter V CC Min Propagation Delay PHL PLH 1.3 Bus to Bus Propagation Delay PHL PLH 1 Bus Output Enable Time 1.3 PZL PZH t ...

Page 5

AC Loading and Waveforms FIGURE 1. AC Test Circuit (Input Characteristics: f Symbol 3.3V 0. FIGURE 2. Waveform for Inverting and ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...

Related keywords

74alvc
74alvch16841
74alvt16373dgg
74alvch16373dgg
74alvch16260
74alvch1622
74alvth32373zker
74alvch16373zqlr
74ALVCH162373TX datasheet
74ALVCH162373TX data sheet
74ALVCH162373TX pdf datasheet
74ALVCH162373TX component
74ALVCH162373TX part
74ALVCH162373TX distributor
74ALVCH162373TX RoHS
74ALVCH162373TX datasheet download