74LV4094PW,112 NXP Semiconductors, 74LV4094PW,112 Datasheet
74LV4094PW,112
Specifications of 74LV4094PW,112
935175020112
Related parts for 74LV4094PW,112
74LV4094PW,112 Summary of contents
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Rev. 3 — 7 March 2011 1. General description The 74LV4094 is a low voltage Si-gate CMOS device and is pin and functional compatible with 74HC4094; 74HCT4094. The 74LV4094 is an 8-stage serial shift register. ...
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... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Package Temperature range −40 °C to +125 °C 74LV4094N −40 °C to +125 °C 74LV4094D −40 °C to +125 °C 74LV4094DB −40 °C to +125 °C 74LV4094PW 5. Functional diagram 3 CP STR Fig 1. Functional diagram 74LV4094 Product data sheet ...
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... NXP Semiconductors Fig 3. Logic diagram STAGE LATCH 0 STR OE Fig 4. Logic diagram 74LV4094 Product data sheet D 2 8-STAGE SHIFT CP REGISTER 3 STR 8-BIT STORAGE 1 REGISTER OE 15 3-STATE OUTPUTS QP0 QP1 QP2 QP3 QP4 QP5 QP6 QP7 STAGES QP2 QP4 QP0 QP1 QP3 QP5 All information provided in this document is subject to legal disclaimers. Rev. 3 — ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning 74LV4094 STR QP0 4 5 QP1 QP2 6 7 QP3 GND 8 001aaf120 Fig 5. Pin configuration DIP16 and SO16 6.2 Pin description Table 2. Pin description Symbol Pin STR QP0 to QP7 14, 13, 12 QS1, QS2 9, 74LV4094 Product data sheet QP4 ...
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... NXP Semiconductors 7. Functional description [1] Table 3. Function table Inputs CP OE STR ↑ ↓ ↑ ↑ ↑ ↓ [1] At the positive clock edge, the information in the 7th register stage is transferred to the 8th register stage and the QSn outputs HIGH voltage level LOW voltage level don’t care; ...
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... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK I output clamping current OK I output current O I supply current CC I ground current ...
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... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V HIGH-level V IH input voltage LOW-level V IL input voltage HIGH-level V OH output voltage V V LOW-level V OL output voltage V I input leakage V I current ...
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... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C Symbol Parameter Conditions t propagation CP to QS1; see pd delay QS2; see QPn; see STR to QPn; see enable time OE to QPn; see disable time OE to QPn; see dis 74LV4094 Product data sheet = 50 pF unless otherwise specified ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C Symbol Parameter Conditions t pulse width CP HIGH or LOW; see STR HIGH; see set-up time D to CP; see STR; see hold time D to CP; see STR; see maximum CP; see max frequency 74LV4094 Product data sheet … ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C Symbol Parameter Conditions C power pF MHz dissipation V = GND capacitance [1] All typical values are measured at T [2] All typical values are measured the same as t and PLH PHL [ the same as t and t ...
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... NXP Semiconductors CP input STR input QPn output Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 9. Propagation delay strobe input (STR) to output (QPn), strobe input (STR) pulse width and the clock set-up and hold times for strobe input ...
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... NXP Semiconductors OE input LOW-to-OFF OFF-to-LOW HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 11. Enable and disable times Table 8. Measurement points Supply voltage Input < 2.7 V 0.5V 2 3.6 V 1.5 V 74LV4094 Product data sheet ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 12. Test circuit for measuring switching times Table 9. Test data ...
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... NXP Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT338-1 Fig 15. Package outline SOT338-1 (SSOP16) ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... Data sheet status Product data sheet The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Figure 6: pin configuration drawing added for (T)SSOP16 packages. ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74LV4094 Product data sheet 16 ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 13 Package outline ...