AGR18045E TRIQUINT [TriQuint Semiconductor], AGR18045E Datasheet

AGR18045E

Manufacturer Part Number

AGR18045E

Description

45 W, 1.805 GHz-1.880 GHz, LDMOS RF Power Transistor

Manufacturer

TRIQUINT [TriQuint Semiconductor]

Datasheet

1.AGR18045E.pdf (9 pages)

Available stocks

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Manufacturer

Quantity

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Company:

Meier Automation Equipment Co., Limited

Part Number:

AGR18045EF

Manufacturer:

ASI

Quantity:

20 000

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Introduction

The AGR18045E is a high-voltage, gold-metallized,

laterally diffused metal oxide semiconductor

(LDMOS) RF power field effect transistor (FET) suit-

able for global system for mobile communication

(GSM), enhanced data for global evolution (EDGE),

and multicarrier class AB power amplifier applica-

tions. This device is manufactured using advanced

LDMOS technology offering state-of-the-art perfor-

mance and reliability. It is packaged in an industry-

standard package and is capable of delivering a min-

imum output power of 45 W, which makes it ideally

suited for today’s RF power amplifier applications.

Features

AGR18045E

45 W, 1.805 GHz—1.880 GHz, LDMOS RF Power Transistor

Typical performance ratings for GSM EDGE

(f = 1.840 GHz, P

— Error vector magnitude (EVM): 1.9%

— Power gain: 15 dB

— Drain efficiency: 32%

— Modulation spectrum:

Typical continuous wave (CW) performance over

entire digital communication system (DCS) band:

— P1dB: 49 W typical (typ).

— Power gain: @ P1dB = 14 dB.

— Efficiency: @ P1dB = 53% typ.

— Return loss: –12 dB.

High-reliability, gold-metallization process.

Low hot carrier injection (HCI) induced bias drift

over 20 years.

Internally matched.

High gain, efficiency, and linearity.

Integrated ESD protection.

45 W minimum output power.

Device can withstand 10:1 voltage standing wave

ratio (VSWR) at 26 Vdc, 1.840 GHz, 45 W CW

output power.

Large signal impedance parameters available.

@ ±400 kHz = –63 dBc.

@ ±600 kHz = –73 dBc.

Figure 1. Available (flanged) Package

OUT

= 15 W)

Table 1. Thermal Characteristics

Table 2. Absolute Maximum Ratings*

* Stresses in excess of the absolute maximum ratings can cause

Table 3. ESD Rating*

* Although electrostatic discharge (ESD) protection circuitry has

Caution: MOS devices are susceptible to damage from elec-

Drain-source Voltage

Gate-source Voltage

Drain Current Continuous

Total Dissipation at T

Operating Junction Tempera-

Storage Temperature Range

Thermal Resistance,

been designed into this device, proper precautions must be

taken to avoid exposure to ESD and electrical overstress (EOS)

during all handling, assembly, and test operations. Agere

employs a human-body model (HBM), a machine model (MM),

and a charged-device model (CDM) qualification requirement in

order to determine ESD-susceptibility limits and protection

design evaluation. ESD voltage thresholds are dependent on the

circuit parameters used in each of the models, as defined by

JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and

JESD22-C101A (CDM) standards.

permanent damage to the device. These are absolute stress rat-

ings only. Functional operation of the device is not implied at

these or any other conditions in excess of those given in the

operational sections of the data sheet. Exposure to absolute

maximum ratings for extended periods can adversely affect

device reliability.

Derate Above 25 °C

ture

Junction to Case

AGR18045E

HBM

CDM

Parameter

trostatic charge. Reasonable precautions in han-

dling and packaging MOS devices should be

observed.

Parameter

Minimum (V)

= 25 °C

1500

500

Sym

ı JC

Sym

STG

DSS

—

Value

1.5

–65, 150

–0.5, 15 Vdc

Value

0.67

115

200

PEAK Devices

Class

°C/W

Unit

W/°C

Unit

Vdc

Adc

°C

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