CYIL1SM0300AA_09 CYPRESS [Cypress Semiconductor], CYIL1SM0300AA_09 Datasheet

CYIL1SM0300AA_09

Manufacturer Part Number

CYIL1SM0300AA_09

Description

LUPA-300 CMOS Image Sensor

Manufacturer

CYPRESS [Cypress Semiconductor]

Datasheet

1.CYIL1SM0300AA_09.pdf (31 pages)

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Features

■

Applications

■

Cypress Semiconductor Corporation

Document Number: 001-00371 Rev. *F

Optical Format

Active Pixels

Pixel Size

Shutter Type

Maximum Data Rate/Master

Clock

Frame Rate

ADC Resolution

Responsivity

Dynamic Range

Supply Voltage

Power Consumption

Operating Temperature

Color Filter Array

Packaging

640 x 480 active pixels (VGA resolution).

9.9 μm

sensor technology of FillFactory (US patent No. 6,225,670 and

others)).

Optical format: ½ optical inch

Pixel rate of 80 MHz

On-chip 10 bit ADCs

Full snapshot shutter.

Random programmable windowing.

48-pin LCC package

Sub sampling (Y direction)

Programmable read out direction (X and Y)

Machine Vision

Motion Tracking

Parameter

square pixels (based on the high-fill factor active pixel

½ inch

640 (H) x 480 (V)

9.9 μm x 9.9 μm

Electronic Snapshot Shutter

80 MPS/80 MHz

250 fps (640 x 480)

10-bit, on-chip

3200 V.m2/W.s

17 V/lux.s

61 dB

Analog: 2.5V to 3.3V

Digital: 2.5V

I/O: 2.5V

190 mWatt

–40°C to 70°C

Mono

RGB Bayer Pattern

48-pins LCC

Typical View

•

198 Champion Court

LUPA-300 CMOS Image Sensor

Figure 1. LUPA-300 CMOS Image Sensor

Overview

This document describes the interfacing and driving of the

LUPA-300 image sensor. This VGA-resolution CMOS active

pixel sensor features synchronous shutter and a maximal frame

rate of 250 fps in full resolution. The readout speed can be

boosted by means of sub sampling and windowed Region Of

Interest (ROI) readout. High dynamic range scenes can be

captured using the double and multiple slope functionality. User

programmable row and column start/stop positions allow

windowing. Sub sampling reduces resolution while maintaining

the constant field of view and an increased frame rate. The

programmable gain and offset amplifier maps the signal swing to

the ADC input range. A 10-bit ADC converts the analog data to

a 10-bit digital word stream. The sensor uses a 3-wire

Serial-Parallel (SPI) interface. It operates with a 3.3V and 2.5V

power supply and requires only one master clock for operation

up to 80 MHz pixel rate. It is housed in an 48-pin ceramic LCC

package.

The sensor is available in a monochrome version or Bayer (RGB)

patterned color filter array.

This data sheet allows the user to develop a camera-system

based on the described timing and interfacing.

•

San Jose

CA 95134-1709

CYIL1SM0300AA

Revised October 15, 2009

•

408-943-2600

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