ADE3000SXT STMicroelectronics, ADE3000SXT Datasheet - Page 52
ADE3000SXT
Manufacturer Part Number
ADE3000SXT
Description
LCD Display Engines with Integrated DVI/ ADC and YUV Ports
Manufacturer
STMicroelectronics
Datasheet
1.ADE3000SXT.pdf
(88 pages)
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Output Sequencer Block
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2.15
Output Sequencer Block
The output sequencer module provides timing for the output video interface. It allows sufficient
flexibility to support a broad range of Smart Panel applications as well. The timing unit is based on
horizontal and vertical counters, which are locked with the input video stream.
Frame Synchronization
Due to the limited pixel memory of the chip, the output active video needs to be perfectly
synchronized with the input active video. This mode of operation is called Frame Lock .
Timing Unit
The timing unit consists of a 12-bit horizontal and a 12-bit vertical counter, synchronized with the
input video stream.
Signal Generation
The signal generation unit generates all fixed control signals like hsync, vsync and data enable as
well as those required to run the internal data path. Also included, a generalized timing section
supports flat panel TCON signals like polarity and other control signals.
Figure 4: Output Sequencer Block Diagram
Figure 5: Frame Lock Operation
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