MK41T56N00 STMICROELECTRONICS [STMicroelectronics], MK41T56N00 Datasheet - Page 5

• Manufacturer Part Number: MK41T56N00
• Description: 512 bit 64b x8 Serial Access TIMEKEEPER SRAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Table 9. Power Down/Up Mode AC Characteristics
(T
Figure 5. Power Down/Up Mode AC Waveforms
OPERATION (cont’d)
The clock continually monitors V
tolerance condition. Should V
the device terminates an access in progress and
resets the device address counter. Inputs to the
device will not be recognized at this time to prevent
erroneous data from being written to the device
from an out of tolerance system. When V
below V
to the battery and powers down into an ultra low
current mode of operation to conserve battery life.
Upon power-up, the device switches from battery
to V
goes above V
A
Symbol
= 0 to 70 C or –40 to 85 C)
CC
t
t
t
REC
t
PD
FB
RB
at V
BAT
V CC
V PFD
V SO
SDA
SCL
I BAT
, the device automatically switches over
BAT
PFD
SCL and SDA at V
V
V
SCL and SDA at V
PFD
SO
and recognizes inputs when V
volts.
to V
(min) to V
tPD
PFD
(min) V
SO
CC
V
IH
IH
CC
CC
before Power Down
after Power Up
CC
fall below V
Fall Time
Rise Time
tFB
for an out of
Parameter
CC
DATA RETENTION TIME
PFD
falls
CC
,
2-WIRE BUS CHARACTERISTICS
This bus is intended for communication between
different ICs. It consists of two lines: one bi-direc-
tional for data signals (SDA) and one for clock
signals (SCL). Both the SDA and the SCL lines
must be connected to a positive supply voltage via
a pull-up resistor.
The following protocol has been defined:
– Data transfer may be initiated only when the
– During data transfer, the data line must remain
– Changes in the data line while the clock line is
bus is not busy.
stable whenever the clock line is High.
High will be interpreted as control signals.
tRB
Min
300
100
200
0
MK41T56, MKI41T56
tREC
Max
AI00595
Unit
ns
s
s
s
5/15