STA8088EXG STMICROELECTRONICS [STMicroelectronics], STA8088EXG Datasheet

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STA8088EXG

Manufacturer Part Number
STA8088EXG
Description
Flexible GPS/Galileo/Glonass/QZSS receiver with high performance processing (ARM9)
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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Features
March 2012
This is information on a product in full production. For further information contact your local STMicroelectronics sales
office.
STMicroelectronics
positioning receiver with 32 tracking channels
and 2 fast acquisition channels compatible
with GPS, Galileo, Glonass and QZSS systems
Embedded RF front-end with built-in LNA
-162dBm indoor sensitivity (tracking mode)
Fast TTFF < 1 s in hot start and 35 s in cold
start
Support of ST-AGPSTM Multimode Assisted
GPS (extended ephemeris solution)
High performance ARM946 MCU (up to
208 MHz)
256 Kbyte embedded TCM/SRAM
FSMC external memory interface (NAND, NOR
and SRAM)
External SQI Flash interface
One 16-bit Extended Function Timer (EFT)
with input capture/ output compare and PWM.
Four 32-bit free running timers/ counters
Real Time Clock (RTC) circuit
3 UARTs (one full for modem support)
1 I
1 Synchronous Serial Port (SSP, Motorola-SPI
supported)
USB2.0 dual role full speed (12 MHz) with
integrated physical layer transceiver
2 Secure-Digital Multimedia Memory Card
Interfaces (SDMMC)
2 Controller Area Network (CAN)
1 Multichannel Serial Port (MSP)
GPIO port for a total of up to 64 GPIOs
8-channels ADC (10 bit)
2
C master/slave interface
®
3rd generation
Flexible GPS/Galileo/Glonass/QZSS receiver with
Doc ID 022725 Rev. 2
high performance processing (ARM9)
Description
STA8088EXG is a single die standalone
positioning receiver IC working on multiple
constellations (GPS/Galileo/Glonass/QZSS).
By combining the ARM946 microcontroller core
with the large number of peripherals/ interfaces,
STA8088EXG provides a highly-flexible and cost
effective solution for hand-held and telematic
applications.
The device is the ideal solution for sensor-based
and sensor-less ST Dead Reckoning
technologies which enhance positioning accuracy
even in areas without GNSS signals, like tunnels
and indoor parking.
Selectable 1.8 V or 3.3 V I/Os for specific I/O
ports
3 embedded 1.8 V voltage regultators
Operating condition:
– V
– V
– V
– V
Package:
– TFBGA169 9 x 9 x 1.2 mm 0.65 pitch
– TFBGA169 12 x 12 x 1.2 mm 0.8 pitch
Ambient temperature range: -40/ +85 °C
DD12
DD18/RF18
LPVR
ddIO
: 1.8 V -5 %/ +10 %; 3.3 V ±10 %
: 1.2 V ±10 %
: 1.62 V to 3.6 V
: 1.8 V ±5 %
STA8088EXG
Data brief
TFBGA169
production data
www.st.com
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STA8088EXG Summary of contents

Page 1

... TFBGA169 1.2 mm 0.65 pitch – TFBGA169 1.2 mm 0.8 pitch ■ Ambient temperature range: -40/ +85 °C Description STA8088EXG is a single die standalone positioning receiver IC working on multiple constellations (GPS/Galileo/Glonass/QZSS). By combining the ARM946 microcontroller core with the large number of peripherals/ interfaces, STA8088EXG provides a highly-flexible and cost effective solution for hand-held and telematic applications ...

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Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of tables Table 1. TFBGA169 ball out Automotive Grade (with CAN ...

Page 4

... List of figures Figure 1. STA8088EXG system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. TFBGA169 1.2 mm package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 3. TFBGA169 1.2 mm package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 4. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4/24 Doc ID 022725 Rev. 2 ...

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... It also provides clock generation via PLL, backup logic with real time clock and it supports USB2.0 standard at full speed. STA8088EXG is software compatible with the ARM processor family. The device is power supplied with 1.8 V and uses three on-chip voltage regulators to internally supply the RF front-end, core logic the backup logic. In order to reduce the power consumption the chip can be directly powered with 1 ...

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... Pin description 2.1 Block diagram Figure 1. STA8088EXG system block diagram 6/24 Doc ID 022725 Rev. 2 ...

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TFBGA169 ball out Table 1. TFBGA169 ball out Automotive Grade (with CAN USB_DM USB_DP A GNDIO CAN0TX (UART1_RX) (UART1_TX) CAN1TX CAN1RX B VDDIO_r2 CAN0RX (P0.8) (P0.9) MSPOUT MSPOUT MSPOUT_SD/ C SCLK LRCLK Iopwrsel_r2 VDDIO_r5 (P0.31) ...

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Table 2. TFBGA169 ball out (no CAN USB_DM USB_DP A GNDIO N.C. (UART1_RX) (UART1_TX) I2C_SD I2C_SCLK B VDDIO_r2 N.C. (P0.8) (P0.9) MSPOUT MSPOUT MSPOUT_SD/ C SCLK LRCLK Iopwrsel_r2 VDDIO_r5 (P0.31) (P0.30) (P0.29) MMC_CMD VDD18 D MMC_CLK ...

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Power supply pins Table 3. Power supply pins Symbol I/O VDD18_MVR Pwr Digital supply voltage for main voltage regulator (1.8 V) Digital supply voltage for core circuitry (1.2 V). When using the MVR, this pin shall not be driven ...

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Main function pins Table 4. Main function pins Symbol I/O voltage RSTn 1.2 V STDBYn 1.2 V WAKEUP 1.2 V STDBY_Out 1.2 V PPS_Out VDD_IOR1 RTC_XTI 1.5 V (max) RTC_XTO 1.5 V (max) (1) CAN0TX VDD_IOR5 (1) CAN0RX VDD_IOR5 ...

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FSMC external memory interface pins Table 6. FSMC memory interface pins Symbol I/O Voltage FSMC_Data[15:0] VDD_IOR3 (1)(2) FSMC_Add[23:0] VDD_IOR3 FSMC _OutEN VDD_IOR3 FSMC _WEN VDD_IOR3 FSMC _WTn VDD_IOR3 FSMC _BLn[0,1] VDD_IOR3 FSMC _CLK VDD_IOR3 FSMC _ADV VDD_IOR3 FSMC _CS0 ...

Page 12

Table 7. SQI pins (continued) Symbol I/O Voltage SQI_SCK VDD_IOR4 SQI_CEn/ VDD_IOR4 iopwrsel_r4 SQI pins are multiplexed with P0[13:10] and P0[19] (see 2.8 Port 0 pins Port 0 consists of a 32-bit bidirectional I/O port. It can be either used ...

Page 13

Table 8. Port 0 pins (continued) Symbol I/O voltage I/O I Default CAN1RX P0.9 VDD_IOR5 I/O O I/O Default SQI_SIO0/SI: SQI Flash data I ser. I P0.10 VDD_IOR4 I/O I/O Default SQI_SIO1/SO: SQI Flash data I ...

Page 14

Table 8. Port 0 pins (continued) Symbol I/O voltage I/O I/O Default MMC_DATA0: multimedia card data 0 P0.20 VDD_IOR2 I/O O I/O Default MMC_DATA1: multimedia card data 1 P0.21 VDD_IOR2 I/O O I/O Default MMC_DATA2: multimedia card data 2 P0.22 ...

Page 15

Port 1 pins Port 1 consists of a 32-bit bidirectional I/O port. It can be either used as general purpose input or output port, or configured according to the associated alternate functions. Table 9. Port 1 pins Symbol I/O ...

Page 16

Table 9. Port 1 pins (continued) Symbol I/O Voltage I/O O P1.9 VDD_IOR3 I/O O P1.10 VDD_IOR3 I/O O P1.11 VDD_IOR3 I/O O P1.12 VDD_IOR3 I/O O P1.13 VDD_IOR3 I/O O P1.14 VDD_IOR3 I/O O P1.15 VDD_IOR3 I/O O P1.16 ...

Page 17

Table 9. Port 1 pins (continued) Symbol I/O Voltage I/O O P1.25 VDD_IOR3 I/O O P1.26 VDD_IOR3 I/O O P1.27 VDD_IOR3 I/O O P1.28 VDD_IOR3 I/O O P1.29 VDD_IOR3 I/O O P1.30 VDD_IOR3 I/O O P1.31 VDD_IOR3 I/O 2.10 RF ...

Page 18

Package and packing information ® 3.1 ECOPACK In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are ...

Page 19

The tolerance of position that controls the location of the balls within the matrix with respect to each other.For each ball there is a cylindrical tolerance zone fff perpendicular to datum C and located on true position as defined ...

Page 20

TFBGA169 1.2 mm package information Table 12. TFBGA169 1.2 mm mechanical data Ref. dim Min. (1) A ( (3) b 0.35 D 11. 11.85 E1 ...

Page 21

Figure 3. TFBGA169 1.2 mm package dimension 1. – The terminal A1 corner must be identified on the top surface by using a corner chamfer, ink or metallized markings, or other feature of package body or ...

Page 22

Ordering information Figure 4. Ordering information scheme Example code: STA8088EX G Family identifier GNSS 22/ Automotive Grade Package option Packing Doc ID 022725 Rev Tape and Reel <blank> = Tray 8 = TFBGA169 ...

Page 23

Revision history Table 13. Document revision history Date Revision 23-Jan-2012 26-Mar-2012 1 Initial release. Updated Features list Table 4: Main function pins: – USB_DP/UART1_TX, USB_DM/UART1_RX: updated I/O 2 Added Section 3.3: TFBGA169 1.2 mm package ...

Page 24

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any ...

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