STA8088FG STMICROELECTRONICS [STMicroelectronics], STA8088FG Datasheet
STA8088FG
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STA8088FG Summary of contents
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... VFQFPN56 ( 0.85 mm) 0.4 mm pitch ■ Ambient temperature range: -40/+85°C Description STA8088FG is a single die standalone positioning receiver IC working on multiple constellations (GPS/Galileo/Glonass/QZSS). The minimum BOM make STA8088FG the ideal solution for low-cost and small footprint products such handheld computers, cameras, data loggers, and sports accessories ...
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... VFQFPN56 pin configuration 2.3 Power supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Main function pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 Test/emulated dedicated pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.6 RF front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.7 Port 0 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.8 Port 1 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 ECOPACK 3.2 VFQFPN56 0.85 mm package information . . . . . . . . . . . . . . . . . . 13 4 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/ ® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Doc ID 022666 Rev 2 STA8088FG ...
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... STA8088FG List of tables Table 1. Power supply pins Table 2. Main function pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3. Test/emulated dedicated pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 4. RF front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 5. Port 0 pins Table 6. Port 1 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 7. VFQFPN56 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 8. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Doc ID 022666 Rev 2 List of tables 3/17 ...
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... List of figures List of figures Figure 1. STA8088FG system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. VFQFPN56 connection diagram - with CAN (bottom view Figure 3. VFQFPN56 connection diagram - no CAN (bottom view Figure 4. VFQFPN56 0.85 mm package dimension Figure 5. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4/17 Doc ID 022666 Rev 2 STA8088FG ...
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... It also provides clock generation via PLL, backup logic with real time clock and it supports USB2.0 standard at full speed, (12 Mbps) with on-chip PHY. STA8088FG is software compatible with the ARM processor family. The device is power supplied with 1.8V and uses three on-chip voltage regulators to internally supply the RF front-end, core logic and the backup logic ...
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... Pin description 2 Pin description 2.1 Block diagram Figure 1. STA8088FG system block diagram G3 Base Band Acq 32 Trk GALGPS IF RAMs Channels APB 2 Fast Acq Glonass IF Bridge Channel AHB ROM APB 16KB Bridge2 VIC 64KHIGH SPEED D – TCM 8 I-Cache 16KB APB ARM 946 Bridge1 D-Cache ...
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... STA8088FG 2.2 VFQFPN56 pin configuration Figure 2. VFQFPN56 connection diagram - with CAN (bottom view) Doc ID 022666 Rev 2 Pin description 7/17 ...
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... Digital supply voltage for core circuitry (1.2 V). When using the MVR, this pin shall not be driven by an external voltage supply, but a capacitance shall be connected between these pins and GND to guarantee on-chip voltage stability. Digital supply voltage for low power voltage regulator (1.62 - 3.6 V) Doc ID 022666 Rev 2 STA8088FG VFQFN56 31,4 22,47,30 29 ...
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... STA8088FG Table 1. Power supply pins (continued) Symbol I/O VDD12_LPVR Pwr VDD_IOR1 Pwr VDD_IOR3 Pwr VDD_IOR4 Pwr VDD_IOR5 Pwr VRF18_RFVR Pwr VRF12OUT_RFVR Pwr VRF12_LNA Pwr VRF12_RFA Pwr VRF12_MIX Pwr VRF12_IF Pwr VRF12_RFVCO Pwr VRF12_RFADC Pwr GND_LNA GND GND GND 2.4 Main function pins Table 2. ...
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... VRF12_LNA RFA_IN VRF12_RFA XTAL_In VRF12_RFDig XTAL_Out VRF12_RFDig 2.7 Port 0 pins Port 0 consists of a 32-bit bidirectional I/O port (only 3-bit are used in STA8088FG). It can be either used as general purpose Input or Output port, or configured according to the associated alternate functions. 10/17 I/O Functions O CAN0 - transmit data output I CAN0 - receive data input ) ...
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... VDD_IOR5 Only for STA8088FGB (see Figure 5: Ordering information scheme 2.8 Port 1 pins Port 1 consists of a 32-bit bidirectional I/O port (only9-bit are used in STA8088FG). It can be either used as general purpose Input or Output port, or configured according to the associated alternate functions. Table 6. Port 1 pins Symbol I/O Voltage ...
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... Default UART0_RX: UART 0 Rx data A GPIO38: general purpose I/O C SQI_SIO2: SQI Flash data I/O 2 Default UART0_TX / BOOT_1: UART 0 Tx data / ARM Boot 1 A GPIO39: general purpose I/O C SQI_SIO3: SQI Flash data I GPIO53: general purpose I/O Doc ID 022666 Rev 2 STA8088FG Functions VFQFPN56 ...
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... STA8088FG 3 Package and packing information ® 3.1 ECOPACK In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. 3.2 VFQFPN56 0.85 mm package information Table 7 ...
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... Package and packing information Figure 4. VFQFPN56 0.85 mm package dimension 14/17 Doc ID 022666 Rev 2 STA8088FG ...
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... STA8088FG 4 Ordering information Figure 5. Ordering information scheme Example code: STA8088F Family identifier GNSS CAN Bus Packing TR = Tape and Reel <blank> = Tray B = Yes <blank> GPS/Glonass/Galileo/QZSS <blank> = GPS/QZSS SAL with Stacked Flash Doc ID 022666 Rev 2 Ordering information 15/17 ...
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... Revision 1 Initial release. Updated Features list Updated following figures: – Figure 2: VFQFPN56 connection diagram - with CAN (bottom view) 2 – Figure 3: VFQFPN56 connection diagram - no CAN (bottom view) Table 2: Main function pins – USB_DP/UART1_TX, USB_DM/UART1_RX: updated I/O Doc ID 022666 Rev 2 STA8088FG Changes : ...
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... STA8088FG Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...