74HC147D,653 NXP Semiconductors, 74HC147D,653 Datasheet - Page 2

• Manufacturer Part Number: 74HC147D,653
• Description: IC 10:4 LINE PRIORITY ENC 16SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCr
• Type: Priority Encoderr

Specifications of 74HC147D,653

• Package / Case: 16-SOIC (3.9mm Width)
• Circuit: 1 x 10:4
• Independent Circuits: 1
• Voltage Supply Source: Single Supply
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Product: Decoders, Encoders, Multiplexers & Demultiplexers
• Logic Family: HC
• Number Of Lines (input / Output): 9.0 / 4.0
• Propagation Delay Time: 160 ns at 2V, 32 ns at 4.5V, 27 ns at 6V
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Input Lines: 9.0
• Number Of Output Lines: 4.0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4556-2; 74HC147D-T; 74HC147D-T; 933714500653

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
December 1990
t
C
C
PHL
Encodes 10-line decimal to 4-line BCD
Useful for 10-position switch encoding
Used in code converters and generators
Output capability: standard
I
10-to-4 line priority encoder
I
PD
SYMBOL
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
/ t
CC
PD
= input frequency in MHz
L
category: MSI
= output frequency in MHz
(C
PLH
= output load capacitance in pF
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
L
D
= C
V
amb
CC
PD
2
propagation delay A
input capacitance
power dissipation capacitance per package
= 25 C; t
V
f
o
CC
) = sum of outputs
2
f
r
i
= t
I
= GND to V
I
f
PARAMETER
= GND to V
= 6 ns
(C
L
n
to Y
V
CC
n
CC
2
CC
f
o
) where:
1.5 V
2
.
GENERAL DESCRIPTION
The 74HC/HCT147 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT147 9-input priority encoders accept data
from nine active LOW inputs (A
binary representation on the four active LOW outputs
(Y
two or more inputs are simultaneously active, the input
with the highest priority is represented on the output, with
input line A
The devices provide the 10-line to 4-line priority encoding
function by use of the implied decimal “zero”. The “zero” is
encoded when all nine data inputs are HIGH, forcing all
four outputs HIGH.
C
notes 1 and 2
D
0
L
in W):
to Y
= 15 pF; V
CONDITIONS
3
). A priority is assigned to each input so that when
8
having the highest priority.
CC
= 5 V
15
3.5
30
HC
TYPICAL
0
74HC/HCT147
to A
Product specification
17
3.5
33
8
) and provide a
HCT
ns
pF
pF
UNIT