CBT3126DB,118 NXP Semiconductors, CBT3126DB,118 Datasheet

IC FET BUS SWITCH QUAD 14SSOP

CBT3126DB,118

Manufacturer Part Number
CBT3126DB,118
Description
IC FET BUS SWITCH QUAD 14SSOP
Manufacturer
NXP Semiconductors
Series
74CBTr
Type
FET Bus Switchr
Datasheet

Specifications of CBT3126DB,118

Circuit
1 x 1:1
Independent Circuits
4
Current - Output High, Low
15mA, 64mA
Voltage Supply Source
Single Supply
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935270734118
CBT3126DB-T
CBT3126DB-T
1. General description
2. Features
3. Ordering information
Table 1.
[1]
Type number
CBT3126D
CBT3126DB
CBT3126PW
CBT3126DS
Also known as QSOP16.
Ordering information
Temperature range
40 C to +85 C
40 C to +85 C
40 C to +85 C
40 C to +85 C
The CBT3126 is a quad FET bus switch with independent line switches. Each switch is
disabled when the associated Output Enable (OE) input is LOW.
The CBT3126 is characterized for operation from 40 C to +85 C.
I
I
I
I
I
I
I
I
CBT3126
Quad FET bus switch
Rev. 04 — 12 October 2009
Standard ’126-type pinout
Multiple package options
5
TTL-compatible input levels
Minimal propagation delay through the switch
Latch-up protection exceeds 500 mA per JEDEC standard JESD78 class II level A
ESD protection:
Specified from 40 C to +85 C
N
N
N
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
switch connection between two ports
Package
Name
SO14
SSOP14
TSSOP14
SSOP16
[1]
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic shrink small outline package; 14 leads;
body width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
plastic shrink small outline package; 16 leads;
body width 3.9 mm; lead pitch 0.635 mm
Product data sheet
Version
SOT108-1
SOT337-1
SOT402-1
SOT519-1

Related parts for CBT3126DB,118

CBT3126DB,118 Summary of contents

Page 1

CBT3126 Quad FET bus switch Rev. 04 — 12 October 2009 1. General description The CBT3126 is a quad FET bus switch with independent line switches. Each switch is disabled when the associated Output Enable (OE) input is LOW. The ...

Page 2

... NXP Semiconductors 4. Functional diagram 1OE 1A 2OE 2A 3OE 3A 4OE 4A Fig 1. Logic symbol 5. Pinning information 5.1 Pinning CBT3126 1 14 1OE 4OE 2OE 3OE GND 3B 001aaj111 Fig 3. Pin configuration SOT108-1 (SO14) 5.2 Pin description Table 2. Pin description Symbol Pin SOT108-1 SOT337-1 and SOT402-1 ...

Page 3

... NXP Semiconductors Table 2. Pin description …continued Symbol Pin SOT108-1 SOT337-1 and SOT402-1 GND n. Functional description Table 3. Function selection H = HIGH voltage level LOW voltage level. Inputs Switch nOE disconnected connected 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). ...

Page 4

... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics +85 C. amb Symbol Parameter V input clamping voltage IK V pass voltage pass I input leakage current I I supply current CC I additional supply current CC C input capacitance I C off-state input/output capacitance io(off resistance ON [1] All typical values are measured at V [2] This is the increase in supply current for each input that is at the specifi ...

Page 5

... NXP Semiconductors 11. AC waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 6. The input (nA, nB) to output (nB, nA) propagation delay times nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in ...

Page 6

... NXP Semiconductors 12. Test information Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 8. Test circuit for measuring switching times Table 9 ...

Page 7

... NXP Semiconductors 13. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 8

... NXP Semiconductors SSOP14: plastic shrink small outline package; 14 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT337-1 Fig 10. Package outline SOT337-1 (SSOP14) ...

Page 9

... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 10

... NXP Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.25 1.55 mm 1.73 0.25 0.10 1.40 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION ...

Page 11

... NXP Semiconductors 14. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date CBT3126_4 20091012 • Modifications: Section 7 “Limiting values” ...

Page 12

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 13

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional description . . . . . . . . . . . . . . . . . . . 3 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 5 12 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 14 Abbreviations ...

Related keywords