74HC158N,652 NXP Semiconductors, 74HC158N,652 Datasheet

IC QUAD 2-IN MUX INV 16DIP

74HC158N,652

Manufacturer Part Number
74HC158N,652
Description
IC QUAD 2-IN MUX INV 16DIP
Manufacturer
NXP Semiconductors
Series
74HCr
Type
Multiplexerr
Datasheet
1.74HC158D652.pdf (16 pages)

Specifications of 74HC158N,652

Circuit
4 x 2:1
Independent Circuits
1
Current - Output High, Low
5.2mA, 5.2mA
Voltage Supply Source
Single Supply
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HC158N
74HC158N
933669350652
1. General description
2. Features
The 74HC is a high-speed Si-gate CMOS device and is pin compatible with low power
Schottky TTL (LSTTL). The 74HC158 is specified in compliance with JEDEC
standard no. 7A.
The 74HC158 is a quad 2-input multiplexer which select 4 bits of data from two sources
and are controlled by a common data select input (S). The four outputs present the
selected data in the inverted form. The enable input (E) is active LOW.
When E is HIGH, all the outputs (1Y to 4Y) are forced HIGH regardless of all other input
conditions.
Moving the data from two groups of registers to four common output buses is a common
use of the 74HC158. The state of S determines the particular register from which the data
comes. It can also be used as a function generator.
The device is useful for implementing highly irregular logic by generating any four of the
16 different functions of two variables with one variable common.
The 74HC158 is the logic implementation of a 4-pole, 2-position switch, where the position
of the switch is determined by the logic levels applied to S.
The logic equations for the output are:
1Y = E.(1l1.S
2Y = E.(2l1.S
3Y = E.(3l1.S
4Y = E.(4l1.S
The 74HC158 is identical to the 74HC157 but has inverting outputs.
74HC158
Quad 2-input multiplexer; inverting
Rev. 03 — 12 November 2004
Low-power dissipation
Inverting data path
Complies with JEDEC standard no. 7A
ESD protection:
Multiple package options
Specified from 40 C to +80 C and from 40 C to +125 C.
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
1l0.S)
2l0.S)
3l0.S)
4l0.S)
Product data sheet

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74HC158N,652 Summary of contents

Page 1

Quad 2-input multiplexer; inverting Rev. 03 — 12 November 2004 1. General description The 74HC is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC158 is specified in compliance with JEDEC ...

Page 2

Philips Semiconductors 3. Quick reference data Table 1: GND = Symbol PHL PLH [ input frequency in MHz output ...

Page 3

Philips Semiconductors 5. Functional diagram Fig 1. Functional diagram Fig 2. Logic symbol 9397 750 13805 Product data sheet 1I0 1I1 2I0 1 S MULTIPLEXER 15 E OUTPUTS 1I0 4 ...

Page 4

Philips Semiconductors Fig 4. Logic diagram 6. Pinning information 6.1 Pinning Fig 5. Pin configuration 9397 750 13805 Product data sheet S E 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 S 1 1I0 2 3 1I1 1Y 4 158 ...

Page 5

Philips Semiconductors 6.2 Pin description Table 3: Symbol S 1I0 1I1 1Y 2I0 2I1 2Y GND 3Y 3I1 3I0 4Y 4I1 4I0 Functional description 7.1 Function table Table 4: Control [ ...

Page 6

Philips Semiconductors 8. Limiting values Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol GND ...

Page 7

Philips Semiconductors 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter amb V HIGH-level input voltage IH V LOW-level input voltage IL V ...

Page 8

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current LI I quiescent supply current ...

Page 9

Philips Semiconductors 11. Dynamic characteristics Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter amb propagation delay nI0, ...

Page 10

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter +125 C amb propagation delay nI0, ...

Page 11

Philips Semiconductors Fig 7. Waveforms showing the enable input (E) to output (nY) propagation delays and the Fig 8. Load circuitry for switching times Table 9: Supply V CC 2.0 V 4.5 V 6.0 V 5.0 V 9397 750 13805 ...

Page 12

Philips Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. ...

Page 13

Philips Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 ...

Page 14

Philips Semiconductors 14. Revision history Table 10: Revision history Document ID Release date 74HC158_3 20041112 • Modifications: The format of this data sheet has been redesigned to comply with the current presentation and information standard of Philips Semiconductors. • Removed ...

Page 15

Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 16

Philips Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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