74HC4515D,653 NXP Semiconductors, 74HC4515D,653 Datasheet - Page 2

• Manufacturer Part Number: 74HC4515D,653
• Description: IC DECODR/DEMUX 4-16 LINE 24SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCr
• Type: Decoder/Demultiplexerr

Specifications of 74HC4515D,653

• Circuit: 1 x 4:16
• Independent Circuits: 1
• Voltage Supply Source: Single Supply
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Logical Function: Latch/Decoder/Demux
• Logic Family: HC
• Number Of Elements: 1
• Polarity: Inverting
• Number Of Inputs: 4
• Number Of Outputs: 16
• Output Type: Standard
• Propagation Delay Time: 375ns
• Package Type: SOIC W
• High Level Output Current: -7.8mA
• Low Level Output Current: 7.8mA
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 6V
• Operating Supply Voltage (min): 2V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 24
• Quiescent Current: 8uA
• Technology: CMOS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 74HC4515D-T; 74HC4515D-T; 933730180653

Philips Semiconductors
FEATURES
GENERAL DESCRIPTION
The 74HC/HCT4515 are high-speed Si-gate CMOS
devices and are pin compatible with “4515” of the “4000B”
series. They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
September 1993
SYMBOL
t
C
C
PHL
Inverting outputs
Output capability: standard
I
4-to-16 line decoder/demultiplexer with
input latches; inverting
I
PD
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
/ t
CC
PD
= input frequency in MHz
L
category: MSI
= output frequency in MHz
(C
PLH
= output load capacitance in pF
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
L
D
= C
V
amb
CC
PD
2
PARAMETER
propagation delay A
input capacitance
power dissipation capacitance per package
= 25 C; t
V
f
o
CC
) = sum of outputs
2
f
r
i
= t
+ (C
I
I
f
= GND to V
= GND to V
= 6 ns
L
n
V
to Q
CC
2
n
CC
CC
f
o
) where:
1.5 V
2
.
The 74HC/HCT4515 are 4-to-16 line
decoders/demultiplexers having four binary weighted
address inputs (A
(LE), and an active LOW enable input (E). The 16 inverting
outputs (Q
When LE is HIGH, the selected output is determined by the
data on A
A
When E is LOW, the selected output, determined by the
contents of the latch, is LOW. When E is HIGH, all outputs
are HIGH. The enable input (E) does not affect the state of
the latch.
When the “4515” is used as a demultiplexer, E is the data
input and A
n
D
CONDITIONS
C
notes 1 and 2
are stored in the latches and the outputs remain stable.
in W):
L
= 15 pF; V
n
0
. When LE goes LOW, the last data present at
0
to Q
to A
CC
15
3
0
) are mutually exclusive active LOW.
are the address inputs.
to A
= 5 V
3
) with latches, a latch enable input
HC
25
3.5
44
74HC/HCT4515
TYPICAL
Product specification
HCT
26
3.5
46
UNIT
ns
pF
pF