HYS64D128320HU-5-C QIMONDA [Qimonda AG], HYS64D128320HU-5-C Datasheet
HYS64D128320HU-5-C
Related parts for HYS64D128320HU-5-C
HYS64D128320HU-5-C Summary of contents
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– – 643 U– ]– C ...
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... Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: techdoc@qimonda.com qag_techdoc_rev400 / 3.2 QAG / 2006-08-01 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 2 Internet Data Sheet ...
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... European Parliament and of the Council of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers. Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules –5 –6 DDR400B DDR333B PC3200– ...
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... All product types end with a place code designating the silicon-die revision. Reference information available on request. Example: HYS64D128320HU–5–C, indicating Rev.C die are used for SDRAM components. 2) The Compliance Code is printed on the module labels and describes the speed sort (for example “PC3200”), the latencies (for example “ ...
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... CAS Address Signals 59 BA0 I 52 BA1 I Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules and Table 5 respectively. The pin numbering is depicted in Figure 1. Table 4 Buffer Function Type SSTL Clock Signals 2:0 – SSTL SSTL SSTL Complement Clock Signals 2:0 – ...
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... SSTL Address Bus 11:0 SSTL SSTL SSTL SSTL SSTL Address Signal 12 Note: Module based on 256 Mbit or larger dies – Note: 128 Mbit based module SSTL Address Signal 13 Note: 1 Gbit based module – Note: Module based on 512 Mbit or smaller dies 6 Internet Data Sheet ...
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... DQ16 I/O 24 DQ17 I/O 28 DQ18 I/O 31 DQ19 I/O 114 DQ20 I/O 117 DQ21 I/O Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules Buffer Function Type SSTL Data Bus 63:0 SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL ...
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... DQ56 I/O 84 DQ57 I/O 87 DQ58 I/O 88 DQ59 I/O 174 DQ60 I/O 175 DQ61 I/O Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules Buffer Function Type SSTL Data Bus 63:0 SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL ...
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... DM6 I 177 DM7 I 140 DM8 EEPROM 92 SCL I Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules Buffer Function Type SSTL Data Bus 63:0 SSTL SSTL Check Bit 0 – SSTL Check Bit 1 – SSTL Check Bit 2 – SSTL Check Bit 3 – ...
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... V PWR DD 38, 46, 70, 85, 108, 120, 148, 168 Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules Buffer Function Type OD Serial Bus Data CMOS Slave Address Select Bus 2:0 CMOS CMOS – I/O Reference Voltage – EEPROM Power Supply – I/O Driver Power Supply – ...
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... Other Pins DDID 10, 71, 90, 101, 102, 103, 113, 163, 173 Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules Buffer Function Type – Ground Plane OD V Identification DD – Not connected 11 Internet Data Sheet ...
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... CMOS Levels Open Drain. The corresponding pin has 2 operational states, active low and tristate, and allows multiple devices to share as a wire-OR. 12 Internet Data Sheet HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules TABLE 4 Abbreviations for Pin Type TABLE 5 Abbreviations for Buffer Type ...
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... DD DDQ DDID Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules Pin Configuration 184-Pin, UDIMM Ω ± 2. DQ, DQS, DM resistors are 22 3. BAn, An, RAS, CAS, WE resistors are 3 13 Internet Data Sheet FIGURE Ω ± ...
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... HYS[64/72]D[16/32/128]3xxHU–[5/6]–C SDRAMs # row/bank/ SDRAMs columns bits 32M ×16 4 13/2/10 64M ×8 8 13/2/11 64M ×8 9 13/2/11 64M ×8 16 13/2/11 64M ×8 18 13/2/11 14 Internet Data Sheet Unbuffered DDR SDRAM Modules TABLE 6 Address Format Refresh Period Interval 7.8 ms ...
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... V 0.5 × V 0.51 × V DDQ DDQ DDQ V – 0. 0.04 REF REF 21 Internet Data Sheet Unbuffered DDR SDRAM Modules TABLE 12 Absolute Maximum Ratings Values Unit Note/ Test Condition max 0.5 V – DDQ +3.6 V – +3.6 V – +3.6 V – °C +70 – °C +150 – – W – – ...
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... V ± 0.2 V; VDDQ = 2.6 V ± 0.1 V, VDD = +2.6 V ± 0.1 V (DDR400 system supply for signal termination resistors, is expected to be set equal REF stabilizes. REF 22 Internet Data Sheet HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 1) Unit Note/Test Condition 6) — ...
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... V or ≤ IH,MIN IL,MAX for DQ, DQS and DM. ILMAX IN REF IH,MIN RC RAS,MAX OUT 23 Internet Data Sheet HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules TABLE 14 I Conditions DD Symbol I DD0 I DD1 I DD2P I DD2F I DD2Q I DD3P I DD3N I DD4R I DD4W I DD5 I DD6 I ...
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... Test condition for maximum values The module I values are calculated from the component I DDx m × I [component × I [component] with m and n number of components of rank 1 and 2; n=0 for 1 rank modules DDx DD3N currents are not included into calculations: module I DDQ 5) The module I ...
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... Test condition for maximum values The module I values are calculated from the component I DDx m × I [component × I [component] with m and n number of components of rank 1 and 2; n=0 for 1 rank modules DDx DD3N currents are not included into calculations: module I DDQ 5) The module I ...
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... +0.7 –0.7 0.6 — 0.75 0.7 — 0.8 2.2 — 2.2 26 Internet Data Sheet Unbuffered DDR SDRAM Modules TABLE 17 Unit Note/ Test 1) Condition Max. 2)3)4)5) +0.7 ns 2)3)4)5) 0. 2)3)4) 3.0 2)3)4) 2.5 2)3)4) 2.0 2)3)4)5) 0. 2)3)4)5) 2)3)4)5) — ns 2)3)4)5)6) — ns 2)3)4)5) +0.6 ns 2)3)4)5) — ...
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... V ± 0.2 V (DDR333 2.6 V ± 0 DDQ stabilizes. REF is equal to the actual system clock cycle time Internet Data Sheet HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules Unit Note/ Test Condition Max. — ns fast slew rate 3)4)5)6)10) — ns slow slew rate ...
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... HIGH to LOW at this time, depending on tDQSS. 12) The maximum limit for this parameter is not a device limit. The device operates with a greater value for this parameter, but system performance (bus turnaround) degrades accordingly. Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 28 Internet Data Sheet ...
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... This chapter lists all hexadecimal byte values stored in the EEPROM of the products described in this data sheet. SPD stands for serial presence detect. All values with XX in the table are module specific bytes which are defined during production. List of SPD Code Tables • ...
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... Manufacturer’s JEDEC ID Code (4) 68 Manufacturer’s JEDEC ID Code (5) 69 Manufacturer’s JEDEC ID Code (6) Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules HYS64D32301HU–5–C HYS64D32301HU–6–C 256MB 256MB ×64 ×64 1 Rank (×16) 1 Rank (×16) PC3200U–30331 PC2700U– ...
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... Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number 99 - 127 Not used Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules HYS64D32301HU–5–C HYS64D32301HU–6–C 256MB 256MB ×64 ×64 1 Rank (×16) 1 Rank (×16) PC3200U–30331 PC2700U– ...
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... Internet Data Sheet HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules TABLE 19 512MB 512MB 512MB ×64 ×72 ×72 1 Rank (×8) 1 Rank (×8) 1 Rank (×8) PC2700U– PC3200U– PC2700U– 25331 30331 25331 Rev. 1.0 Rev ...
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... Checksum of Byte 0-62 64 Manufacturer’s JEDEC ID Code (1) 65 Manufacturer’s JEDEC ID Code (2) 66 Manufacturer’s JEDEC ID Code (3) Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 512MB 512MB 512MB ×64 ×64 ×72 1 Rank (×8) 1 Rank (×8) 1 Rank (×8) PC3200U– ...
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... Part Number, Char 17 90 Part Number, Char 18 91 Module Revision Code 92 Test Program Revision Code Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 512MB 512MB 512MB ×64 ×64 ×72 1 Rank (×8) 1 Rank (×8) 1 Rank (×8) PC3200U– PC2700U– ...
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... Description 93 Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number 99 - 127 Not used Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 512MB 512MB 512MB ×64 ×64 ×72 1 Rank (×8) 1 Rank (×8) 1 Rank (×8) PC3200U– ...
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... C1 36 Internet Data Sheet HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules TABLE 20 1 GByte 1 GByte 1 GByte ×64 ×72 ×72 PC2700U– PC3200U– PC2700U– 25331 30331 25331 Rev. 1.0 Rev. 1.0 Rev. 1.0 HEX HEX ...
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... SPD Revision 63 Checksum of Byte 0-62 64 Manufacturer’s JEDEC ID Code (1) 65 Manufacturer’s JEDEC ID Code (2) Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 1 GByte 1 GByte 1 GByte ×64 ×64 ×72 2 Ranks (×8) 2 Ranks (×8) 2 Ranks (×8) 2 Ranks (×8) PC3200U– PC2700U– ...
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... Part Number, Char 16 89 Part Number, Char 17 90 Part Number, Char 18 91 Module Revision Code Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 1 GByte 1 GByte 1 GByte ×64 ×64 ×72 2 Ranks (×8) 2 Ranks (×8) 2 Ranks (×8) 2 Ranks (×8) PC3200U– PC2700U– ...
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... Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number 99 - 127 Not used Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 1 GByte 1 GByte 1 GByte ×64 ×64 ×72 2 Ranks (×8) 2 Ranks (×8) 2 Ranks (×8) 2 Ranks (×8) PC3200U– ...
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... Package Outlines Package Outline for HYS64D32301HU–[5/6]–C 1 2.36 ±0.1 ø0 64. MIN. Detail of contacts 1.27 1 ±0. ECC modules only Burr max. 0.4 allowed Rev. 1.21, 2006-09 03292006-RA8T-MSZL Package Outline UDIMM Raw Card C (L-DIM-184-18) 133.35 128. 6.62 C 2.175 6.35 49. 1.27 = 120.65 1.8 ±0 ...
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... Burr max. 0.4 allowed Rev. 1.21, 2006-09 03292006-RA8T-MSZL Package Outline UDIMM Raw Card A (L-DIM-184-32) 133.35 128.95 A 6.62 C 2.175 6.35 49. 1.27 = 120.65 1.8 ±0 Internet Data Sheet HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules FIGURE 9 0. 2.7 MAX 0.4 1.27 ±0.1 184 ...
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... Package Outline for HYS72D64300HU–[5/6]– 2.36 ±0.1 ø0 64. MIN. Detail of contacts 1.27 1 ±0. ECC modules only Burr max. 0.4 allowed Rev. 1.21, 2006-09 03292006-RA8T-MSZL Package Outline UDIMM Raw Card A (L-DIM-184-30) 133.35 128. 6.62 C 2.175 6.35 49. 1.27 = 120.65 1.8 ±0 Internet Data Sheet HYS[64/72]D[16/32/128]3xxHU– ...
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... Package Outline for HYS[64/72]D128320HU–[5/6]– 2.36 ±0.1 ø0 64. MIN. Detail of contacts 1.27 1 ±0. ECC modules only Burr max. 0.4 allowed Rev. 1.21, 2006-09 03292006-RA8T-MSZL Package Outline UDIMM Raw Card B (L-DIM-184-31) 133.35 128. 6.62 C 2.175 6.35 49. 1.27 = 120.65 1.8 ±0 ...
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... Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2 Specification and Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4 SPD Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Rev. 1.21, 2006-09 03292006-RA8T-MSZL HYS[64/72]D[16/32/128]3xxHU–[5/6]–C Unbuffered DDR SDRAM Modules 39 Internet Data Sheet ...
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Edition 2006-09 Published by Qimonda AG Gustav-Heinemann-Ring 212 D-81739 München, Germany © Qimonda AG 2006. All Rights Reserved. Legal Disclaimer The information given in this Internet Data Sheet shall in no event be regarded as a guarantee of conditions or ...