HYS64D64020GBDL-6-C INFINEON [Infineon Technologies AG], HYS64D64020GBDL-6-C Datasheet - Page 6

• Manufacturer Part Number: HYS64D64020GBDL-6-C
• Description: 200-Pin Small Outline Dual-In-Line Memory Modules
• Manufacturer: INFINEON [Infineon Technologies AG]

200-Pin Small Outline Dual-In-Line Memory Modules
SO-DIMM
1
1.1
•
•
•
•
•
•
•
•
•
•
•
Table 1
Part Number Speed Code
Speed Grade
max. Clock Frequency
1.2
The HYS64D64020HBDL–5–C and HYS64D64020GBDL–5–C are industry standard 200-Pin Small Outline
Dual-In-Line Memory Modules (SO-DIMMs) organized as 64M 64. The memory array is designed with Double
Data Rate Synchronous DRAMs (DDR SDRAM). A variety of decoupling capacitors are mounted on the PC board.
The DIMMs feature serial presence detect based on a serial E
128 bytes are programmed with configuration data and the second 128 bytes are available to the customer.
Notes
1. All part numbers end with a place code designating the silicon-die revision. Reference information available on
2. The Compliance Code is printed on the module labels describing the speed sort (for example “PC2700”), the
1) RCD: Row-Column-Delay
Data Sheet
Non-parity 200-Pin Small Outline Dual-In-Line Memory Modules
Two ranks 64M 64 organization
JEDEC standard Double Data Rate Synchronous DRAMs (DDR SDRAM)
Single +2.5 V ( 0.2 V) power supply and Single +2.6V ( 0.1 V) power supply for DDR400
Built with 256 Mbit DDR SDRAMs organised as 8 in P–TFBGA–60 packages
Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
All inputs and outputs SSTL_2 compatible
Serial Presence Detect with E
Jedec standard form factor: 67.60 mm
Gold plated contacts
request. Example: HYS64D32020GDL-6-B, indicating rev. B dies are used for SDRAM components.
latencies and SPD code definition (for example “2033–0” means CAS latency of 2.0 clocks, RCD
3 clocks, Row Precharge latency of 3 clocks, and JEDEC SPD code definiton version 0), and the Raw Card
used for this module.
Overview
Features
Performance
Description
2
PROM
Module
@CL2.5
@CL2
Component
@CL3
31.75 mm
f
f
f
CK3
CK2.5
CK2
6
3.80 mm
–5
DDR400B
PC3200–3033
200
166
133
2
PROM device using the 2-pin I
HYS64D64020GBDL–5–C
HYS64D64020GBDL–6–C
HYS64D64020HBDL–5–C
HYS64D64020HBDL–6–C
–6
DDR333B
PC2700–2533
166
166
133
2
C protocol. The first
Rev. 1.1, 2004-05
1)
latency of
Unit
—
—
MHz
MHz
MHz