LIS3LV02DL_08 STMICROELECTRONICS [STMicroelectronics], LIS3LV02DL_08 Datasheet - Page 34

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LIS3LV02DL_08

Manufacturer Part Number
LIS3LV02DL_08
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Register description
7.10
7.11
7.12
34/48
CTRL_REG3 (22h)
Table 34.
Table 35.
FDS bit enables (FDS=1) or bypass (FDS=0) the high pass filter in the signal chain of the
sensor.
CFS1, CFS0 bits defines the coefficient Hpc to be used to calculate the -3dB cut-off
frequency of the high pass filter:
HP_FILTER_RESET (23h)
Dummy register. Reading at this address zeroes instantaneously the content of the internal
high pass-filter. Read data is not significant.
STATUS_REG (27h)
Table 36.
Table 37.
ECK
HPDD
HPFF
FDS
CFS1, CFS0
ZYXOR
ZOR
YOR
XOR
ECK
ZYXOR
Register (22h)
Register description (22h)
Register (27h)
Register description (27h)
HPDD
External Clock. Default value: 0
(0: clock from internal oscillator; 1: clock from external pad)
High Pass filter enabled for Direction Detection. Default value: 0
(0: filter bypassed; 1: filter enabled)
High Pass filter enabled for Free-Fall and Wake-Up. Default value: 0
(0: filter bypassed; 1: filter enabled)
Filtered Data Selection. Default value: 0
(0: internal filter bypassed; 1: data from internal filter)
High-pass filter Cut-off Frequency Selection. Default value: 00
(00: Hpc=512
01: Hpc=1024
10: Hpc=2048
11: Hpc=4096)
X, Y and Z axis Data Overrun
Z axis Data Overrun
Y axis Data Overrun
X axis Data Overrun
ZOR
HPFF
YOR
f
cutoff
FDS
XOR
=
0.318
-------------- -
Hpc
ZYXDA
res
ODRx
---------------- -
res
2
ZDA
CFS1
YDA
LIS3LV02DL
CFS0
XDA

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