AN666 SILABS [Silicon Laboratories], AN666 Datasheet - Page 28

• Manufacturer Part Number: AN666
• Description: USAGE GUIDE FOR SIM3U1XX, SIM3C1XX, AND SIM3L1XX DMA AND DTM MODULES
• Manufacturer: SILABS [Silicon Laboratories]

AN666
The DMA_Peri_to_Mem_to_Peri.c code example included in the software package demonstrates a ping-pong
DMA transfer by using the USART0 peripheral (transmit and receive) to receive 2 10-byte character sets from a
Terminal program on the PC using the CP210x USB-to-UART bridge on the MCU Card. When the second set is
received, a second DMA channel displays the received characters in the Terminal program on the PC. This code
example uses two different DMA channels due to the DMA peripheral crossbar mapping and since both the
USART0 receive and USART0 transmit features are used.
8. Using the DMA for a Simultaneous Peripheral-to-Memory-to-Peripheral
A single DMA channel is unable to service more than one peripheral simultaneously. In addition, DMA channels
cannot automatically start or pause a transfer in another channel without core intervention.
The easiest way to perform a peripheral-to-memory-to-peripheral transfer (i.e., I2C-to-memory-to-UART) is to set
up several buffers in memory. Once the first peripheral transfers data to the first buffer, the DMA channel done
interrupt will occur, if enabled. Inside this interrupt service routine, firmware can start the first DMA channel to
transfer data from the source peripheral to a second buffer and set up a second DMA channel to transfer data from
the first buffer to the end peripheral.
The DTM module on SiM3L1xx devices allows these types of transfer to occur without core intervention.
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Transfer
7. Create the alternate descriptor in memory for the desired transfer:
8. Enable data requests for the channel.
9. Set the DMA to fast mode using the FDMAEN bit in the SCONFIG module.
10. Enable the DMA channel using the CHENSET register.
11. (Optional) Enable the DMA channel interrupt.
12. Submit a request to start the transfer.
a. Set the SRCEND field to the last address of the source data.
b. Set the DSTEND field to the peripheral FIFO register.
c. Set the destination and source address increment modes (DSTAIMD and SRCAIMD). For peripheral-
d. Set the destination and source data size (DSTSIZE and SRCSIZE) to the same value.
e. Set the RPOWER to the desired number of data transfers between rearbitration. See the appropriate
f. Set the NCOUNT field to the total number of transfers minus 1.
g. If this is the last action for the DMA channel, set the transfer mode to the basic type (TMD = 1).
to-memory transfers, the source should be in non-incrementing mode. For peripheral-to-memory
transfers, the destination should be in non-incrementing mode.
RPOWER value for the peripheral.
Otherwise, set the transfer mode to the ping-pong type (TMD = 3).
Rev. 0.1