AN666 SILABS [Silicon Laboratories], AN666 Datasheet - Page 3

• Manufacturer Part Number: AN666
• Description: USAGE GUIDE FOR SIM3U1XX, SIM3C1XX, AND SIM3L1XX DMA AND DTM MODULES
• Manufacturer: SILABS [Silicon Laboratories]

4.1. DMA Channel Transfer Descriptors
Each channel has transfer descriptors stored in memory that describe the data transfer in detail. Each descriptor is
composed of four 32-bit words in memory organized as follows:
Each channel can have primary, alternate, and scatter-gather descriptors. The primary and alternate descriptors
are organized in contiguous blocks in memory for each of the channels. The spacing for these descriptors is fixed,
so any unused channels must still be accounted for when placing descriptors in memory. The primary descriptors
must be placed at the start of an address block sized for both the primary and alternate descriptors. For SiM3U1xx,
SiM3C1xx, and SiM3L1xx devices that implement 16 or 10 DMA channels, the BASEPTR points to the start of the
primary descriptors and is 23 bits wide. The valid addresses for the BASEPTR field are multiples of 256
(0x0000_0100), and the required memory for all primary and alternate descriptors for 16 channels is 512 bytes.
The scatter-gather descriptors are more flexible and can appear anywhere in memory.
Channel 0’s primary descriptor begins at address offset 0x0000, Channel 1’s primary descriptor starts at offset
0x0010, and so on. The alternate descriptors begin at the next memory block (256 bytes), regardless of whether or
not the primary descriptors for the channels are in use.
Firmware originally sets the channel configuration descriptor; the DMA controller will modify this word as the
transfer progresses, so firmware should not write to this descriptor until any active transfers for the channel are
complete.
Figure 3 shows the fixed memory configuration for the descriptors.
1. Source End Pointer (word 1): The address of the last source data in the transfer.
2. Destination End Pointer (word 2): The last destination address of the transfer.
3. Channel Configuration (word 3): Configuration details for the transfer.
4. Alignment padding (word 4): Not used by the DMA controller. Firmware may use this word for any
purpose.
Rev. 0.1
AN666
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