GMS81508B HYNIX [Hynix Semiconductor], GMS81508B Datasheet - Page 65

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GMS81508B

Manufacturer Part Number
GMS81508B
Description
HYUNDAI MICRO ELECTRONICS 8-BIT SINGLE-CHIP MICROCONTROLLERS
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
GMS81508B/16B/24B
activated mode: rising edge, falling edge, and both edge.
INT0 ~ INT3 are multiplexed with general I/O ports
(R40~R43). To use as an external interrupt pin, the bit of
R4 port mode register PMR4 should be set to “1” corre-
62
INT1 pin
INT2 pin
INT3 pin
INT0 pin
Figure 16-7 External Interrupt Block Diagram
[0F8H]
2
Interrupt
goes
active
IEDS
2
2
max. 12 f
Interrupt
latched
2
Edge selection
Register
XIN
Figure 16-8 Interrupt Response Timing Diagram
INT3IF
INT1IF
INT2IF
INT0IF
INT0 INTERRUPT
INT1 INTERRUPT
INT2 INTERRUPT
INT3 INTERRUPT
8 f
Interrupt
processing
XIN
spondingly.
Example: To use as an INT0 and INT2
;**** Set port as an input port R40,R42
;**** Set port as an external interrupt port
;**** Set Falling-edge Detection
Response Time
The INT0 ~ INT3 edge are latched into INT1IF ~ INT3IF
at every machine cycle. The values are not actually polled
by the circuitry until the next machine cycle. If a request is
active and conditions are right for it to be acknowledged, a
hardware subroutine call to the requested service routine
will be the next instruction to be executed. The DIV itself
takes twelve cycles. Thus, a minimum of twelve complete
machine cycles elapse between activation of an external
interrupt request and the beginning of execution of the first
instruction of the service routine.
Figure 16-8shows interrupt response timings.
Interrupt
routine
:
:
LDM
;
LDM
;
LDM
:
:
:
R4DD,#1111_1010B
PMR4,#05H
IEDS,#0001_0001B
HYUNDAI MicroElectronics
DEC. 1999 Ver 1.04

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